diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-05-23 11:37:32 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-06-05 19:15:10 -0400 |
| commit | 5ee823507b3c7d2187df2160125a4f64232d3a60 (patch) | |
| tree | f5109154f9ea442581cf0000dd5c3faa3466310f /include/asm-mips/delay.h | |
| parent | f3bf07b9a367c342bcbc9f47d525d3cf5e8b4f3b (diff) | |
[MIPS] Fix instable BogoMIPS on multi-issue processors.
Increase alignment of BogoMIPS loop to 8 bytes. Having the delay loop
overlap cache line boundaries may cause instable delays.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/delay.h')
| -rw-r--r-- | include/asm-mips/delay.h | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index 64dd45150f64..928f30f8c45c 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h | |||
| @@ -19,20 +19,22 @@ static inline void __delay(unsigned long loops) | |||
| 19 | { | 19 | { |
| 20 | if (sizeof(long) == 4) | 20 | if (sizeof(long) == 4) |
| 21 | __asm__ __volatile__ ( | 21 | __asm__ __volatile__ ( |
| 22 | ".set\tnoreorder\n" | 22 | " .set noreorder \n" |
| 23 | "1:\tbnez\t%0,1b\n\t" | 23 | " .align 3 \n" |
| 24 | "subu\t%0,1\n\t" | 24 | "1: bnez %0, 1b \n" |
| 25 | ".set\treorder" | 25 | " subu %0, 1 \n" |
| 26 | " .set reorder \n" | ||
| 26 | : "=r" (loops) | 27 | : "=r" (loops) |
| 27 | : "0" (loops)); | 28 | : "0" (loops)); |
| 28 | else if (sizeof(long) == 8) | 29 | else if (sizeof(long) == 8) |
| 29 | __asm__ __volatile__ ( | 30 | __asm__ __volatile__ ( |
| 30 | ".set\tnoreorder\n" | 31 | " .set noreorder \n" |
| 31 | "1:\tbnez\t%0,1b\n\t" | 32 | " .align 3 \n" |
| 32 | "dsubu\t%0,1\n\t" | 33 | "1: bnez %0, 1b \n" |
| 33 | ".set\treorder" | 34 | " dsubu %0, 1 \n" |
| 34 | :"=r" (loops) | 35 | " .set reorder \n" |
| 35 | :"0" (loops)); | 36 | : "=r" (loops) |
| 37 | : "0" (loops)); | ||
| 36 | } | 38 | } |
| 37 | 39 | ||
| 38 | 40 | ||