diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-06-17 23:58:57 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-06-19 12:39:24 -0400 |
commit | eaff3888742155bd397e45a1c3323c0173042e5b (patch) | |
tree | bf8ee6203072e01ce0d50db5898137c7552da6e5 /include/asm-mips/ddb5xxx | |
parent | 2925aba4223f4532e85f0c6f64584b3e0b2849c3 (diff) |
[MIPS] Remove support for NEC DDB5074.
As warned several times before.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/ddb5xxx')
-rw-r--r-- | include/asm-mips/ddb5xxx/ddb5074.h | 38 | ||||
-rw-r--r-- | include/asm-mips/ddb5xxx/ddb5xxx.h | 9 |
2 files changed, 1 insertions, 46 deletions
diff --git a/include/asm-mips/ddb5xxx/ddb5074.h b/include/asm-mips/ddb5xxx/ddb5074.h deleted file mode 100644 index 58d88306af65..000000000000 --- a/include/asm-mips/ddb5xxx/ddb5074.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-mips/ddb5074.h -- NEC DDB Vrc-5074 definitions | ||
3 | * | ||
4 | * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com> | ||
5 | * Sony Software Development Center Europe (SDCE), Brussels | ||
6 | */ | ||
7 | |||
8 | #ifndef _ASM_DDB5XXX_DDB5074_H | ||
9 | #define _ASM_DDB5XXX_DDB5074_H | ||
10 | |||
11 | #include <asm/nile4.h> | ||
12 | |||
13 | #define DDB_SDRAM_SIZE 0x04000000 /* 64MB */ | ||
14 | |||
15 | #define DDB_PCI_IO_BASE 0x06000000 | ||
16 | #define DDB_PCI_IO_SIZE 0x02000000 /* 32 MB */ | ||
17 | |||
18 | #define DDB_PCI_MEM_BASE 0x08000000 | ||
19 | #define DDB_PCI_MEM_SIZE 0x08000000 /* 128 MB */ | ||
20 | |||
21 | #define DDB_PCI_CONFIG_BASE DDB_PCI_MEM_BASE | ||
22 | #define DDB_PCI_CONFIG_SIZE DDB_PCI_MEM_SIZE | ||
23 | |||
24 | #define NILE4_PCI_IO_BASE 0xa6000000 | ||
25 | #define NILE4_PCI_MEM_BASE 0xa8000000 | ||
26 | #define NILE4_PCI_CFG_BASE NILE4_PCI_MEM_BASE | ||
27 | #define DDB_PCI_IACK_BASE NILE4_PCI_IO_BASE | ||
28 | |||
29 | #define NILE4_IRQ_BASE NUM_I8259_INTERRUPTS | ||
30 | #define CPU_IRQ_BASE (NUM_NILE4_INTERRUPTS + NILE4_IRQ_BASE) | ||
31 | #define CPU_NILE4_CASCADE 2 | ||
32 | |||
33 | extern void ddb5074_led_hex(int hex); | ||
34 | extern void ddb5074_led_d2(int on); | ||
35 | extern void ddb5074_led_d3(int on); | ||
36 | |||
37 | extern void nile4_irq_setup(u32 base); | ||
38 | #endif | ||
diff --git a/include/asm-mips/ddb5xxx/ddb5xxx.h b/include/asm-mips/ddb5xxx/ddb5xxx.h index 873c03f2c5fe..2c8c93430c1c 100644 --- a/include/asm-mips/ddb5xxx/ddb5xxx.h +++ b/include/asm-mips/ddb5xxx/ddb5xxx.h | |||
@@ -174,13 +174,8 @@ | |||
174 | 174 | ||
175 | static inline void ddb_sync(void) | 175 | static inline void ddb_sync(void) |
176 | { | 176 | { |
177 | /* The DDB5074 doesn't seem to like these accesses. They kill the board on | ||
178 | * interrupt load | ||
179 | */ | ||
180 | #ifndef CONFIG_DDB5074 | ||
181 | volatile u32 *p = (volatile u32 *)0xbfc00000; | 177 | volatile u32 *p = (volatile u32 *)0xbfc00000; |
182 | (void)(*p); | 178 | (void)(*p); |
183 | #endif | ||
184 | } | 179 | } |
185 | 180 | ||
186 | static inline void ddb_out32(u32 offset, u32 val) | 181 | static inline void ddb_out32(u32 offset, u32 val) |
@@ -260,9 +255,7 @@ extern void ddb_pci_reset_bus(void); | |||
260 | /* | 255 | /* |
261 | * include the board dependent part | 256 | * include the board dependent part |
262 | */ | 257 | */ |
263 | #if defined(CONFIG_DDB5074) | 258 | #if defined(CONFIG_DDB5476) |
264 | #include <asm/ddb5xxx/ddb5074.h> | ||
265 | #elif defined(CONFIG_DDB5476) | ||
266 | #include <asm/ddb5xxx/ddb5476.h> | 259 | #include <asm/ddb5xxx/ddb5476.h> |
267 | #elif defined(CONFIG_DDB5477) | 260 | #elif defined(CONFIG_DDB5477) |
268 | #include <asm/ddb5xxx/ddb5477.h> | 261 | #include <asm/ddb5xxx/ddb5477.h> |