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authorDave Jones <davej@redhat.com>2007-02-10 20:36:29 -0500
committerDave Jones <davej@redhat.com>2007-02-10 20:36:29 -0500
commitbd0561c9d8dcbf21cd9aa46c416bbf6a3a12e4b1 (patch)
tree64fe15d4db42e0840acea00e4cf7e1855bba9e96 /include/asm-mips/ddb5xxx/ddb5477.h
parent348f31ed2bd18391fe5903aa0ad7bfcda6d8ca0b (diff)
parent66efc5a7e3061c3597ac43a8bb1026488d57e66b (diff)
[CPUFREQ] Fix up merge conflicts with recent ACPI changes.
Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'include/asm-mips/ddb5xxx/ddb5477.h')
-rw-r--r--include/asm-mips/ddb5xxx/ddb5477.h41
1 files changed, 19 insertions, 22 deletions
diff --git a/include/asm-mips/ddb5xxx/ddb5477.h b/include/asm-mips/ddb5xxx/ddb5477.h
index c5af4b73fdd7..6cf177caf6d5 100644
--- a/include/asm-mips/ddb5xxx/ddb5477.h
+++ b/include/asm-mips/ddb5xxx/ddb5477.h
@@ -17,6 +17,7 @@
17#ifndef __ASM_DDB5XXX_DDB5477_H 17#ifndef __ASM_DDB5XXX_DDB5477_H
18#define __ASM_DDB5XXX_DDB5477_H 18#define __ASM_DDB5XXX_DDB5477_H
19 19
20#include <irq.h>
20 21
21/* 22/*
22 * This contains macros that are specific to DDB5477 or renamed from 23 * This contains macros that are specific to DDB5477 or renamed from
@@ -251,14 +252,10 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
251 */ 252 */
252 253
253#define NUM_CPU_IRQ 8 254#define NUM_CPU_IRQ 8
254#define NUM_I8259_IRQ 16
255#define NUM_VRC5477_IRQ 32 255#define NUM_VRC5477_IRQ 32
256 256
257#define DDB_IRQ_BASE 0 257#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE
258 258#define VRC5477_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
259#define I8259_IRQ_BASE DDB_IRQ_BASE
260#define VRC5477_IRQ_BASE (I8259_IRQ_BASE + NUM_I8259_IRQ)
261#define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ)
262 259
263/* 260/*
264 * vrc5477 irq defs 261 * vrc5477 irq defs
@@ -300,22 +297,22 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
300/* 297/*
301 * i2859 irq assignment 298 * i2859 irq assignment
302 */ 299 */
303#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE) 300#define I8259_IRQ_RESERVED_0 (0 + I8259A_IRQ_BASE)
304#define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */ 301#define I8259_IRQ_KEYBOARD (1 + I8259A_IRQ_BASE) /* M1543 default */
305#define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE) 302#define I8259_IRQ_CASCADE (2 + I8259A_IRQ_BASE)
306#define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */ 303#define I8259_IRQ_UART_B (3 + I8259A_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */
307#define I8259_IRQ_UART_A (4 + I8259_IRQ_BASE) /* M1543 default */ 304#define I8259_IRQ_UART_A (4 + I8259A_IRQ_BASE) /* M1543 default */
308#define I8259_IRQ_PARALLEL (5 + I8259_IRQ_BASE) /* M1543 default */ 305#define I8259_IRQ_PARALLEL (5 + I8259A_IRQ_BASE) /* M1543 default */
309#define I8259_IRQ_RESERVED_6 (6 + I8259_IRQ_BASE) 306#define I8259_IRQ_RESERVED_6 (6 + I8259A_IRQ_BASE)
310#define I8259_IRQ_RESERVED_7 (7 + I8259_IRQ_BASE) 307#define I8259_IRQ_RESERVED_7 (7 + I8259A_IRQ_BASE)
311#define I8259_IRQ_RTC (8 + I8259_IRQ_BASE) /* who set this? */ 308#define I8259_IRQ_RTC (8 + I8259A_IRQ_BASE) /* who set this? */
312#define I8259_IRQ_USB (9 + I8259_IRQ_BASE) /* ddb_setup */ 309#define I8259_IRQ_USB (9 + I8259A_IRQ_BASE) /* ddb_setup */
313#define I8259_IRQ_PMU (10 + I8259_IRQ_BASE) /* ddb_setup */ 310#define I8259_IRQ_PMU (10 + I8259A_IRQ_BASE) /* ddb_setup */
314#define I8259_IRQ_RESERVED_11 (11 + I8259_IRQ_BASE) 311#define I8259_IRQ_RESERVED_11 (11 + I8259A_IRQ_BASE)
315#define I8259_IRQ_RESERVED_12 (12 + I8259_IRQ_BASE) /* m1543_irq_setup */ 312#define I8259_IRQ_RESERVED_12 (12 + I8259A_IRQ_BASE) /* m1543_irq_setup */
316#define I8259_IRQ_RESERVED_13 (13 + I8259_IRQ_BASE) 313#define I8259_IRQ_RESERVED_13 (13 + I8259A_IRQ_BASE)
317#define I8259_IRQ_HDC1 (14 + I8259_IRQ_BASE) /* default and ddb_setup */ 314#define I8259_IRQ_HDC1 (14 + I8259A_IRQ_BASE) /* default and ddb_setup */
318#define I8259_IRQ_HDC2 (15 + I8259_IRQ_BASE) /* default */ 315#define I8259_IRQ_HDC2 (15 + I8259A_IRQ_BASE) /* default */
319 316
320 317
321/* 318/*