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authorFuxin Zhang <zhangfx@lemote.com>2007-06-06 02:52:43 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 12:33:02 -0400
commit2a21c7300b53b744d16903256a172d9cbcfdd03e (patch)
tree6a6f186fc7d4ab51fdda628a42f1fa845f189b8b /include/asm-mips/cpu.h
parentfee578fad1a29e6a149659e5467aedcae6897c06 (diff)
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu.h')
-rw-r--r--include/asm-mips/cpu.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 49c1f0011863..a3623954dad1 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -89,6 +89,8 @@
89#define PRID_IMP_34K 0x9500 89#define PRID_IMP_34K 0x9500
90#define PRID_IMP_24KE 0x9600 90#define PRID_IMP_24KE 0x9600
91#define PRID_IMP_74K 0x9700 91#define PRID_IMP_74K 0x9700
92#define PRID_IMP_LOONGSON1 0x4200
93#define PRID_IMP_LOONGSON2 0x6300
92 94
93/* 95/*
94 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE 96 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
@@ -211,7 +213,10 @@
211#define CPU_SB1A 62 213#define CPU_SB1A 62
212#define CPU_74K 63 214#define CPU_74K 63
213#define CPU_R14000 64 215#define CPU_R14000 64
214#define CPU_LAST 64 216#define CPU_LOONGSON1 65
217#define CPU_LOONGSON2 66
218
219#define CPU_LAST 66
215 220
216/* 221/*
217 * ISA Level encodings 222 * ISA Level encodings