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authorRalf Baechle <ralf@ongar.mips.com>2005-12-09 07:20:49 -0500
committer <ralf@denk.linux-mips.net>2006-01-10 08:39:07 -0500
commit0401572a9b9b2f368176b6e53f53004fd048a566 (patch)
treeac150d269955aeba9eff5bdaa2835626510c9180 /include/asm-mips/cpu.h
parent11e6df65dc2bae8e7ad17ff81611ddc850b279cd (diff)
MIPS: Reorganize ISA constants strictly as bitmasks.
Signed-off-by: Ralf Baechle <ralf@ongar.mips.com>
Diffstat (limited to 'include/asm-mips/cpu.h')
-rw-r--r--include/asm-mips/cpu.h17
1 files changed, 10 insertions, 7 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 48c37c46053a..934e063e79f1 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -202,17 +202,20 @@
202 * ISA Level encodings 202 * ISA Level encodings
203 * 203 *
204 */ 204 */
205#define MIPS_CPU_ISA_64BIT 0x00008000
206
207#define MIPS_CPU_ISA_I 0x00000001 205#define MIPS_CPU_ISA_I 0x00000001
208#define MIPS_CPU_ISA_II 0x00000002 206#define MIPS_CPU_ISA_II 0x00000002
209#define MIPS_CPU_ISA_III (0x00000003 | MIPS_CPU_ISA_64BIT) 207#define MIPS_CPU_ISA_III 0x00000003
210#define MIPS_CPU_ISA_IV (0x00000004 | MIPS_CPU_ISA_64BIT) 208#define MIPS_CPU_ISA_IV 0x00000004
211#define MIPS_CPU_ISA_V (0x00000005 | MIPS_CPU_ISA_64BIT) 209#define MIPS_CPU_ISA_V 0x00000005
212#define MIPS_CPU_ISA_M32R1 0x00000020 210#define MIPS_CPU_ISA_M32R1 0x00000020
213#define MIPS_CPU_ISA_M32R2 0x00000040 211#define MIPS_CPU_ISA_M32R2 0x00000040
214#define MIPS_CPU_ISA_M64R1 (0x00000080 | MIPS_CPU_ISA_64BIT) 212#define MIPS_CPU_ISA_M64R1 0x00000080
215#define MIPS_CPU_ISA_M64R2 (0x00000100 | MIPS_CPU_ISA_64BIT) 213#define MIPS_CPU_ISA_M64R2 0x00000100
214
215#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \
216 MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 )
217#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
218 MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)
216 219
217/* 220/*
218 * CPU Option encodings 221 * CPU Option encodings