[MIPS] Enable support for the userlocal hardware register

Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 2924069075e0..49c1f0011863 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -257,6 +257,7 @@
 #define MIPS_CPU_PREFETCH       0x00080000 /* CPU has usable prefetch */
 #define MIPS_CPU_VINT           0x00100000 /* CPU supports MIPSR2 vectored interrupts */
 #define MIPS_CPU_VEIC           0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */
+#define MIPS_CPU_ULRI           0x00400000 /* CPU has ULRI feature */
 
 /*
  * CPU ASE encodings