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authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-13 19:57:04 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-13 19:57:04 -0400
commitab6cf0d0cb96417ef65cc2c2120c0e879edf7a4a (patch)
tree97e85188397967013783aba57907fd85bc63cbf2 /include/asm-mips/cpu-features.h
parent0d10e47f9635ecafe5a9dc6e10cb056a87a4daa2 (diff)
parentf4dee85e2c6a7d7adf7ea4d6d3053a41c78175b7 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (53 commits) [MIPS] sparsemem: fix crash in show_mem [MIPS] vr41xx: Update workpad setup function [MIPS] vr41xx: Update e55 setup function [MIPS] vr41xx: Removed old v2.4 VRC4173 driver [MIPS] vr41xx: Move IRQ numbers to asm-mips/vr41xx/irq.h [MIPS] MIPSsim: Build fix, rename sim_timer_setup -> plat_timer_setup. [MIPS] Remove unused code. [MIPS] IP22 Fix brown paper bag in RTC code. [MIPS] Atlas, Malta, SEAD: Don't disable interrupts in mips_time_init(). [MIPS] Replace board_timer_setup function pointer by plat_timer_setup. [MIPS] Nuke redeclarations of board_time_init. [MIPS] Remove redeclarations of setup_irq(). [MIPS] Nuke redeclarations of board_timer_setup. [MIPS] Print out TLB handler assembly for debugging. [MIPS] SMTC: Reformat to Linux style. [MIPS] MIPSsim: Delete redeclaration of ll_local_timer_interrupt. [MIPS] IP27: Reformatting. [MIPS] IP27: Invoke setup_irq for timer interrupt so proc stats will be shown. [MIPS] IP27: irq_chip startup method returns unsigned int. [MIPS] IP27: struct irq_desc member handler was renamed to chip. ...
Diffstat (limited to 'include/asm-mips/cpu-features.h')
-rw-r--r--include/asm-mips/cpu-features.h10
1 files changed, 3 insertions, 7 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 44285a9d5520..eadca266f159 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -143,12 +143,8 @@
143#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) 143#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
144#endif 144#endif
145 145
146#ifdef CONFIG_MIPS_MT
147#ifndef cpu_has_mipsmt 146#ifndef cpu_has_mipsmt
148# define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT) 147#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
149#endif
150#else
151# define cpu_has_mipsmt 0
152#endif 148#endif
153 149
154#ifdef CONFIG_32BIT 150#ifdef CONFIG_32BIT
@@ -199,8 +195,8 @@
199# define cpu_has_veic 0 195# define cpu_has_veic 0
200#endif 196#endif
201 197
202#ifndef cpu_has_subset_pcaches 198#ifndef cpu_has_inclusive_pcaches
203#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES) 199#define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES)
204#endif 200#endif
205 201
206#ifndef cpu_dcache_line_size 202#ifndef cpu_dcache_line_size