diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-02-21 11:18:36 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:30:42 -0400 |
commit | c4ed38a0c6e2e5c4906296758f816ee71373792f (patch) | |
tree | 65ebab9ca61ea6d03109c53acd2989b626dce52a /include/asm-mips/cobalt | |
parent | 049b13c358f0187cf3c5003d5fb9848dbcb28bc3 (diff) |
Resurrect Cobalt support for 2.6.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cobalt')
-rw-r--r-- | include/asm-mips/cobalt/cobalt.h | 52 | ||||
-rw-r--r-- | include/asm-mips/cobalt/mach-gt64120.h | 1 |
2 files changed, 40 insertions, 13 deletions
diff --git a/include/asm-mips/cobalt/cobalt.h b/include/asm-mips/cobalt/cobalt.h index ca1fbc0579fe..78e1df2095fb 100644 --- a/include/asm-mips/cobalt/cobalt.h +++ b/include/asm-mips/cobalt/cobalt.h | |||
@@ -19,18 +19,23 @@ | |||
19 | * 9 - PCI | 19 | * 9 - PCI |
20 | * 14 - IDE0 | 20 | * 14 - IDE0 |
21 | * 15 - IDE1 | 21 | * 15 - IDE1 |
22 | * | 22 | */ |
23 | #define COBALT_QUBE_SLOT_IRQ 9 | ||
24 | |||
25 | /* | ||
23 | * CPU IRQs are 16 ... 23 | 26 | * CPU IRQs are 16 ... 23 |
24 | */ | 27 | */ |
25 | #define COBALT_TIMER_IRQ 18 | 28 | #define COBALT_CPU_IRQ 16 |
26 | #define COBALT_SCC_IRQ 19 /* pre-production has 85C30 */ | 29 | |
27 | #define COBALT_RAQ_SCSI_IRQ 19 | 30 | #define COBALT_GALILEO_IRQ (COBALT_CPU_IRQ + 2) |
28 | #define COBALT_ETH0_IRQ 19 | 31 | #define COBALT_SCC_IRQ (COBALT_CPU_IRQ + 3) /* pre-production has 85C30 */ |
29 | #define COBALT_ETH1_IRQ 20 | 32 | #define COBALT_RAQ_SCSI_IRQ (COBALT_CPU_IRQ + 3) |
30 | #define COBALT_SERIAL_IRQ 21 | 33 | #define COBALT_ETH0_IRQ (COBALT_CPU_IRQ + 3) |
31 | #define COBALT_SCSI_IRQ 21 | 34 | #define COBALT_QUBE1_ETH0_IRQ (COBALT_CPU_IRQ + 4) |
32 | #define COBALT_VIA_IRQ 22 /* Chained to VIA ISA bridge */ | 35 | #define COBALT_ETH1_IRQ (COBALT_CPU_IRQ + 4) |
33 | #define COBALT_QUBE_SLOT_IRQ 23 | 36 | #define COBALT_SERIAL_IRQ (COBALT_CPU_IRQ + 5) |
37 | #define COBALT_SCSI_IRQ (COBALT_CPU_IRQ + 5) | ||
38 | #define COBALT_VIA_IRQ (COBALT_CPU_IRQ + 6) /* Chained to VIA ISA bridge */ | ||
34 | 39 | ||
35 | /* | 40 | /* |
36 | * PCI configuration space manifest constants. These are wired into | 41 | * PCI configuration space manifest constants. These are wired into |
@@ -69,16 +74,21 @@ | |||
69 | * Most of this really should go into a separate GT64111 header file. | 74 | * Most of this really should go into a separate GT64111 header file. |
70 | */ | 75 | */ |
71 | #define GT64111_IO_BASE 0x10000000UL | 76 | #define GT64111_IO_BASE 0x10000000UL |
77 | #define GT64111_IO_END 0x11ffffffUL | ||
78 | #define GT64111_MEM_BASE 0x12000000UL | ||
79 | #define GT64111_MEM_END 0x13ffffffUL | ||
72 | #define GT64111_BASE 0x14000000UL | 80 | #define GT64111_BASE 0x14000000UL |
73 | #define GALILEO_REG(ofs) (KSEG0 + GT64111_BASE + (unsigned long)(ofs)) | 81 | #define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs)) |
74 | 82 | ||
75 | #define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port)) | 83 | #define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port)) |
76 | #define GALILEO_OUTL(val, port) \ | 84 | #define GALILEO_OUTL(val, port) \ |
77 | do { \ | 85 | do { \ |
78 | *(volatile unsigned int *) GALILEO_REG(port) = (port); \ | 86 | *(volatile unsigned int *) GALILEO_REG(port) = (val); \ |
79 | } while (0) | 87 | } while (0) |
80 | 88 | ||
81 | #define GALILEO_T0EXP 0x0100 | 89 | #define GALILEO_INTR_T0EXP (1 << 8) |
90 | #define GALILEO_INTR_RETRY_CTR (1 << 20) | ||
91 | |||
82 | #define GALILEO_ENTC0 0x01 | 92 | #define GALILEO_ENTC0 0x01 |
83 | #define GALILEO_SELTC0 0x02 | 93 | #define GALILEO_SELTC0 0x02 |
84 | 94 | ||
@@ -86,5 +96,21 @@ do { \ | |||
86 | GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \ | 96 | GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \ |
87 | (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS) | 97 | (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS) |
88 | 98 | ||
99 | #define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) | ||
100 | # define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ | ||
101 | # define COBALT_LED_BAR_RIGHT (1 << 1) /* Qube */ | ||
102 | # define COBALT_LED_WEB (1 << 2) /* RaQ */ | ||
103 | # define COBALT_LED_POWER_OFF (1 << 3) /* RaQ */ | ||
104 | # define COBALT_LED_RESET 0x0f | ||
105 | |||
106 | #define COBALT_KEY_PORT ((~*(volatile unsigned int *) CKSEG1ADDR(0x1d000000) >> 24) & COBALT_KEY_MASK) | ||
107 | # define COBALT_KEY_CLEAR (1 << 1) | ||
108 | # define COBALT_KEY_LEFT (1 << 2) | ||
109 | # define COBALT_KEY_UP (1 << 3) | ||
110 | # define COBALT_KEY_DOWN (1 << 4) | ||
111 | # define COBALT_KEY_RIGHT (1 << 5) | ||
112 | # define COBALT_KEY_ENTER (1 << 6) | ||
113 | # define COBALT_KEY_SELECT (1 << 7) | ||
114 | # define COBALT_KEY_MASK 0xfe | ||
89 | 115 | ||
90 | #endif /* __ASM_COBALT_H */ | 116 | #endif /* __ASM_COBALT_H */ |
diff --git a/include/asm-mips/cobalt/mach-gt64120.h b/include/asm-mips/cobalt/mach-gt64120.h new file mode 100644 index 000000000000..587fc4378f44 --- /dev/null +++ b/include/asm-mips/cobalt/mach-gt64120.h | |||
@@ -0,0 +1 @@ | |||
/* there's something here ... in the dark */ | |||