aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-mips/cache.h
diff options
context:
space:
mode:
authorLen Brown <len.brown@intel.com>2006-01-27 17:18:29 -0500
committerLen Brown <len.brown@intel.com>2006-01-27 17:18:29 -0500
commit292dd876ee765c478b27c93cc51e93a558ed58bf (patch)
tree5b740e93253295baee2a9c414a6c66d03d44a9ef /include/asm-mips/cache.h
parentd4ec6c7cc9a15a7a529719bc3b84f46812f9842e (diff)
parent9fdb62af92c741addbea15545f214a6e89460865 (diff)
Pull release into acpica branch
Diffstat (limited to 'include/asm-mips/cache.h')
-rw-r--r--include/asm-mips/cache.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h
index 1a5d1a669db3..55e19f2ff0e0 100644
--- a/include/asm-mips/cache.h
+++ b/include/asm-mips/cache.h
@@ -15,7 +15,6 @@
15#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT 15#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
16#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 16#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
17 17
18#define L1_CACHE_SHIFT_MAX 6
19#define SMP_CACHE_SHIFT L1_CACHE_SHIFT 18#define SMP_CACHE_SHIFT L1_CACHE_SHIFT
20#define SMP_CACHE_BYTES L1_CACHE_BYTES 19#define SMP_CACHE_BYTES L1_CACHE_BYTES
21 20