diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2008-09-16 13:48:51 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 11:18:52 -0400 |
commit | 384740dc49ea651ba350704d13ff6be9976e37fe (patch) | |
tree | a6e80cad287ccae7a86d81bfa692fc96889c88ed /include/asm-mips/byteorder.h | |
parent | e8c7c482347574ecdd45c43e32c332d5fc2ece61 (diff) |
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/byteorder.h')
-rw-r--r-- | include/asm-mips/byteorder.h | 76 |
1 files changed, 0 insertions, 76 deletions
diff --git a/include/asm-mips/byteorder.h b/include/asm-mips/byteorder.h deleted file mode 100644 index fe7dc2d59b69..000000000000 --- a/include/asm-mips/byteorder.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1996, 99, 2003 by Ralf Baechle | ||
7 | */ | ||
8 | #ifndef _ASM_BYTEORDER_H | ||
9 | #define _ASM_BYTEORDER_H | ||
10 | |||
11 | #include <linux/compiler.h> | ||
12 | #include <asm/types.h> | ||
13 | |||
14 | #ifdef __GNUC__ | ||
15 | |||
16 | #ifdef CONFIG_CPU_MIPSR2 | ||
17 | |||
18 | static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) | ||
19 | { | ||
20 | __asm__( | ||
21 | " wsbh %0, %1 \n" | ||
22 | : "=r" (x) | ||
23 | : "r" (x)); | ||
24 | |||
25 | return x; | ||
26 | } | ||
27 | #define __arch__swab16(x) ___arch__swab16(x) | ||
28 | |||
29 | static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) | ||
30 | { | ||
31 | __asm__( | ||
32 | " wsbh %0, %1 \n" | ||
33 | " rotr %0, %0, 16 \n" | ||
34 | : "=r" (x) | ||
35 | : "r" (x)); | ||
36 | |||
37 | return x; | ||
38 | } | ||
39 | #define __arch__swab32(x) ___arch__swab32(x) | ||
40 | |||
41 | #ifdef CONFIG_CPU_MIPS64_R2 | ||
42 | |||
43 | static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) | ||
44 | { | ||
45 | __asm__( | ||
46 | " dsbh %0, %1 \n" | ||
47 | " dshd %0, %0 \n" | ||
48 | " drotr %0, %0, 32 \n" | ||
49 | : "=r" (x) | ||
50 | : "r" (x)); | ||
51 | |||
52 | return x; | ||
53 | } | ||
54 | |||
55 | #define __arch__swab64(x) ___arch__swab64(x) | ||
56 | |||
57 | #endif /* CONFIG_CPU_MIPS64_R2 */ | ||
58 | |||
59 | #endif /* CONFIG_CPU_MIPSR2 */ | ||
60 | |||
61 | #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
62 | # define __BYTEORDER_HAS_U64__ | ||
63 | # define __SWAB_64_THRU_32__ | ||
64 | #endif | ||
65 | |||
66 | #endif /* __GNUC__ */ | ||
67 | |||
68 | #if defined(__MIPSEB__) | ||
69 | # include <linux/byteorder/big_endian.h> | ||
70 | #elif defined(__MIPSEL__) | ||
71 | # include <linux/byteorder/little_endian.h> | ||
72 | #else | ||
73 | # error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" | ||
74 | #endif | ||
75 | |||
76 | #endif /* _ASM_BYTEORDER_H */ | ||