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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-15 21:07:59 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2008-07-15 21:07:59 -0400
commit84c3d4aaec3338201b449034beac41635866bddf (patch)
tree3412951682fb2dd4feb8a5532f8efbaf8b345933 /include/asm-mips/bitops.h
parent43d2548bb2ef7e6d753f91468a746784041e522d (diff)
parentfafa3a3f16723997f039a0193997464d66dafd8f (diff)
Merge commit 'origin/master'
Manual merge of: arch/powerpc/Kconfig arch/powerpc/kernel/stacktrace.c arch/powerpc/mm/slice.c arch/ppc/kernel/smp.c
Diffstat (limited to 'include/asm-mips/bitops.h')
-rw-r--r--include/asm-mips/bitops.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 642724734eba..9a7274ba6a0b 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -82,7 +82,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
82 "2: b 1b \n" 82 "2: b 1b \n"
83 " .previous \n" 83 " .previous \n"
84 : "=&r" (temp), "=m" (*m) 84 : "=&r" (temp), "=m" (*m)
85 : "ir" (bit), "m" (*m), "r" (~0)); 85 : "i" (bit), "m" (*m), "r" (~0));
86#endif /* CONFIG_CPU_MIPSR2 */ 86#endif /* CONFIG_CPU_MIPSR2 */
87 } else if (cpu_has_llsc) { 87 } else if (cpu_has_llsc) {
88 __asm__ __volatile__( 88 __asm__ __volatile__(
@@ -147,7 +147,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
147 "2: b 1b \n" 147 "2: b 1b \n"
148 " .previous \n" 148 " .previous \n"
149 : "=&r" (temp), "=m" (*m) 149 : "=&r" (temp), "=m" (*m)
150 : "ir" (bit), "m" (*m)); 150 : "i" (bit), "m" (*m));
151#endif /* CONFIG_CPU_MIPSR2 */ 151#endif /* CONFIG_CPU_MIPSR2 */
152 } else if (cpu_has_llsc) { 152 } else if (cpu_has_llsc) {
153 __asm__ __volatile__( 153 __asm__ __volatile__(
@@ -428,7 +428,7 @@ static inline int test_and_clear_bit(unsigned long nr,
428 "2: b 1b \n" 428 "2: b 1b \n"
429 " .previous \n" 429 " .previous \n"
430 : "=&r" (temp), "=m" (*m), "=&r" (res) 430 : "=&r" (temp), "=m" (*m), "=&r" (res)
431 : "ri" (bit), "m" (*m) 431 : "i" (bit), "m" (*m)
432 : "memory"); 432 : "memory");
433#endif 433#endif
434 } else if (cpu_has_llsc) { 434 } else if (cpu_has_llsc) {