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authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 19:44:02 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 19:44:02 -0500
commitc3e59d1e891f6140a346de2b8547e25133c716b0 (patch)
treeb2a669f625009a3a33f20f648bd654637323d296 /include/asm-mips/bitops.h
parentb07e3c3a1db0ce399d2a1d04860e1b901927c05e (diff)
parentaa414dff4f7bef29457592414551becdca72dd6b (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits) [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. [MIPS] Remove unused definition of cpu_to_lelongp() [MIPS] Remove userspace proofing from <asm/bitops.h>. [MIPS] Remove old junk left from old atomic_lock. [MIPS] Use conditional traps for BUG_ON on MIPS II and better. [MIPS] mips HPT cleanup: make clocksource_mips public [MIPS] do_IRQ cleanup [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. [MIPS] Remove redundant r4k_blast_icache() calls [MIPS] Work around bogus gcc warnings. [MIPS] Fix double inclusions [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq [MIPS] IRQ cleanups [MIPS] mips hpt cleanup: get rid of mips_hpt_init [MIPS] PB1200: Remove duplicate definitions [MIPS] Fix alignment hole in struct cache_desc; shrink struct. [MIPS] Oprofile: kernel support for the R10000. [MIPS] Remove unused R10000 performance counter definitions. [MIPS] Add support for kexec [MIPS] Don't print presence of WAIT instruction on bootup. ...
Diffstat (limited to 'include/asm-mips/bitops.h')
-rw-r--r--include/asm-mips/bitops.h65
1 files changed, 21 insertions, 44 deletions
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 1bb89c5a10ee..b9007411b60f 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -10,31 +10,26 @@
10#define _ASM_BITOPS_H 10#define _ASM_BITOPS_H
11 11
12#include <linux/compiler.h> 12#include <linux/compiler.h>
13#include <linux/irqflags.h>
13#include <linux/types.h> 14#include <linux/types.h>
14#include <asm/bug.h> 15#include <asm/bug.h>
15#include <asm/byteorder.h> /* sigh ... */ 16#include <asm/byteorder.h> /* sigh ... */
16#include <asm/cpu-features.h> 17#include <asm/cpu-features.h>
18#include <asm/sgidefs.h>
19#include <asm/war.h>
17 20
18#if (_MIPS_SZLONG == 32) 21#if (_MIPS_SZLONG == 32)
19#define SZLONG_LOG 5 22#define SZLONG_LOG 5
20#define SZLONG_MASK 31UL 23#define SZLONG_MASK 31UL
21#define __LL "ll " 24#define __LL "ll "
22#define __SC "sc " 25#define __SC "sc "
23#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
24#elif (_MIPS_SZLONG == 64) 26#elif (_MIPS_SZLONG == 64)
25#define SZLONG_LOG 6 27#define SZLONG_LOG 6
26#define SZLONG_MASK 63UL 28#define SZLONG_MASK 63UL
27#define __LL "lld " 29#define __LL "lld "
28#define __SC "scd " 30#define __SC "scd "
29#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
30#endif 31#endif
31 32
32#ifdef __KERNEL__
33
34#include <linux/irqflags.h>
35#include <asm/sgidefs.h>
36#include <asm/war.h>
37
38/* 33/*
39 * clear_bit() doesn't provide any barrier for the compiler. 34 * clear_bit() doesn't provide any barrier for the compiler.
40 */ 35 */
@@ -42,20 +37,6 @@
42#define smp_mb__after_clear_bit() smp_mb() 37#define smp_mb__after_clear_bit() smp_mb()
43 38
44/* 39/*
45 * Only disable interrupt for kernel mode stuff to keep usermode stuff
46 * that dares to use kernel include files alive.
47 */
48
49#define __bi_flags unsigned long flags
50#define __bi_local_irq_save(x) local_irq_save(x)
51#define __bi_local_irq_restore(x) local_irq_restore(x)
52#else
53#define __bi_flags
54#define __bi_local_irq_save(x)
55#define __bi_local_irq_restore(x)
56#endif /* __KERNEL__ */
57
58/*
59 * set_bit - Atomically set a bit in memory 40 * set_bit - Atomically set a bit in memory
60 * @nr: the bit to set 41 * @nr: the bit to set
61 * @addr: the address to start counting from 42 * @addr: the address to start counting from
@@ -93,13 +74,13 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
93 } else { 74 } else {
94 volatile unsigned long *a = addr; 75 volatile unsigned long *a = addr;
95 unsigned long mask; 76 unsigned long mask;
96 __bi_flags; 77 unsigned long flags;
97 78
98 a += nr >> SZLONG_LOG; 79 a += nr >> SZLONG_LOG;
99 mask = 1UL << (nr & SZLONG_MASK); 80 mask = 1UL << (nr & SZLONG_MASK);
100 __bi_local_irq_save(flags); 81 local_irq_save(flags);
101 *a |= mask; 82 *a |= mask;
102 __bi_local_irq_restore(flags); 83 local_irq_restore(flags);
103 } 84 }
104} 85}
105 86
@@ -141,13 +122,13 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
141 } else { 122 } else {
142 volatile unsigned long *a = addr; 123 volatile unsigned long *a = addr;
143 unsigned long mask; 124 unsigned long mask;
144 __bi_flags; 125 unsigned long flags;
145 126
146 a += nr >> SZLONG_LOG; 127 a += nr >> SZLONG_LOG;
147 mask = 1UL << (nr & SZLONG_MASK); 128 mask = 1UL << (nr & SZLONG_MASK);
148 __bi_local_irq_save(flags); 129 local_irq_save(flags);
149 *a &= ~mask; 130 *a &= ~mask;
150 __bi_local_irq_restore(flags); 131 local_irq_restore(flags);
151 } 132 }
152} 133}
153 134
@@ -191,13 +172,13 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
191 } else { 172 } else {
192 volatile unsigned long *a = addr; 173 volatile unsigned long *a = addr;
193 unsigned long mask; 174 unsigned long mask;
194 __bi_flags; 175 unsigned long flags;
195 176
196 a += nr >> SZLONG_LOG; 177 a += nr >> SZLONG_LOG;
197 mask = 1UL << (nr & SZLONG_MASK); 178 mask = 1UL << (nr & SZLONG_MASK);
198 __bi_local_irq_save(flags); 179 local_irq_save(flags);
199 *a ^= mask; 180 *a ^= mask;
200 __bi_local_irq_restore(flags); 181 local_irq_restore(flags);
201 } 182 }
202} 183}
203 184
@@ -258,14 +239,14 @@ static inline int test_and_set_bit(unsigned long nr,
258 volatile unsigned long *a = addr; 239 volatile unsigned long *a = addr;
259 unsigned long mask; 240 unsigned long mask;
260 int retval; 241 int retval;
261 __bi_flags; 242 unsigned long flags;
262 243
263 a += nr >> SZLONG_LOG; 244 a += nr >> SZLONG_LOG;
264 mask = 1UL << (nr & SZLONG_MASK); 245 mask = 1UL << (nr & SZLONG_MASK);
265 __bi_local_irq_save(flags); 246 local_irq_save(flags);
266 retval = (mask & *a) != 0; 247 retval = (mask & *a) != 0;
267 *a |= mask; 248 *a |= mask;
268 __bi_local_irq_restore(flags); 249 local_irq_restore(flags);
269 250
270 return retval; 251 return retval;
271 } 252 }
@@ -330,14 +311,14 @@ static inline int test_and_clear_bit(unsigned long nr,
330 volatile unsigned long *a = addr; 311 volatile unsigned long *a = addr;
331 unsigned long mask; 312 unsigned long mask;
332 int retval; 313 int retval;
333 __bi_flags; 314 unsigned long flags;
334 315
335 a += nr >> SZLONG_LOG; 316 a += nr >> SZLONG_LOG;
336 mask = 1UL << (nr & SZLONG_MASK); 317 mask = 1UL << (nr & SZLONG_MASK);
337 __bi_local_irq_save(flags); 318 local_irq_save(flags);
338 retval = (mask & *a) != 0; 319 retval = (mask & *a) != 0;
339 *a &= ~mask; 320 *a &= ~mask;
340 __bi_local_irq_restore(flags); 321 local_irq_restore(flags);
341 322
342 return retval; 323 return retval;
343 } 324 }
@@ -399,23 +380,19 @@ static inline int test_and_change_bit(unsigned long nr,
399 } else { 380 } else {
400 volatile unsigned long *a = addr; 381 volatile unsigned long *a = addr;
401 unsigned long mask, retval; 382 unsigned long mask, retval;
402 __bi_flags; 383 unsigned long flags;
403 384
404 a += nr >> SZLONG_LOG; 385 a += nr >> SZLONG_LOG;
405 mask = 1UL << (nr & SZLONG_MASK); 386 mask = 1UL << (nr & SZLONG_MASK);
406 __bi_local_irq_save(flags); 387 local_irq_save(flags);
407 retval = (mask & *a) != 0; 388 retval = (mask & *a) != 0;
408 *a ^= mask; 389 *a ^= mask;
409 __bi_local_irq_restore(flags); 390 local_irq_restore(flags);
410 391
411 return retval; 392 return retval;
412 } 393 }
413} 394}
414 395
415#undef __bi_flags
416#undef __bi_local_irq_save
417#undef __bi_local_irq_restore
418
419#include <asm-generic/bitops/non-atomic.h> 396#include <asm-generic/bitops/non-atomic.h>
420 397
421/* 398/*