[MIPS] MT: Improved multithreading support.

    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 47 insertions, 0 deletions

diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index 30b18ea6cb11..f54aa147ec19 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -17,7 +17,26 @@
 #ifdef CONFIG_64BIT
 #include <asm/asmmacro-64.h>
 #endif
+#ifdef CONFIG_MIPS_MT_SMTC
+#include <asm/mipsmtregs.h>
+#endif
 
+#ifdef CONFIG_MIPS_MT_SMTC
+        .macro  local_irq_enable reg=t0
+        mfc0    \reg, CP0_TCSTATUS
+        ori     \reg, \reg, TCSTATUS_IXMT
+        xori    \reg, \reg, TCSTATUS_IXMT
+        mtc0    \reg, CP0_TCSTATUS
+        ehb
+        .endm
+
+        .macro  local_irq_disable reg=t0
+        mfc0    \reg, CP0_TCSTATUS
+        ori     \reg, \reg, TCSTATUS_IXMT
+        mtc0    \reg, CP0_TCSTATUS
+        ehb
+        .endm
+#else
         .macro  local_irq_enable reg=t0
         mfc0    \reg, CP0_STATUS
         ori     \reg, \reg, 1
@@ -32,6 +51,7 @@
         mtc0    \reg, CP0_STATUS
         irq_disable_hazard
         .endm
+#endif /* CONFIG_MIPS_MT_SMTC */
 
 #ifdef CONFIG_CPU_SB1
         .macro  fpu_enable_hazard
@@ -48,4 +68,31 @@
         .endm
 #endif
 
+/*
+ * Temporary until all gas have MT ASE support
+ */
+        .macro  DMT     reg=0
+        .word   (0x41600bc1 | (\reg << 16))
+        .endm
+
+        .macro  EMT     reg=0
+        .word   (0x41600be1 | (\reg << 16))
+        .endm
+
+        .macro  DVPE    reg=0
+        .word   (0x41600001 | (\reg << 16))
+        .endm
+
+        .macro  EVPE    reg=0
+        .word   (0x41600021 | (\reg << 16))
+        .endm
+
+        .macro  MFTR    rt=0, rd=0, u=0, sel=0
+         .word  (0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel))
+        .endm
+
+        .macro  MTTR    rt=0, rd=0, u=0, sel=0
+         .word  (0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel))
+        .endm
+
 #endif /* _ASM_ASMMACRO_H */