Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits)
  [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.
  [MIPS] Remove unused definition of cpu_to_lelongp()
  [MIPS] Remove userspace proofing from <asm/bitops.h>.
  [MIPS] Remove old junk left from old atomic_lock.
  [MIPS] Use conditional traps for BUG_ON on MIPS II and better.
  [MIPS] mips HPT cleanup: make clocksource_mips public
  [MIPS] do_IRQ cleanup
  [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
  [MIPS] Remove redundant r4k_blast_icache() calls
  [MIPS] Work around bogus gcc warnings.
  [MIPS] Fix double inclusions
  [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
  [MIPS] IRQ cleanups
  [MIPS] mips hpt cleanup: get rid of mips_hpt_init
  [MIPS] PB1200: Remove duplicate definitions
  [MIPS] Fix alignment hole in struct cache_desc; shrink struct.
  [MIPS] Oprofile: kernel support for the R10000.
  [MIPS] Remove unused R10000 performance counter definitions.
  [MIPS] Add support for kexec
  [MIPS] Don't print presence of WAIT instruction on bootup.
  ...

1 files changed, 22 insertions, 18 deletions

diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 45c706e34df1..c6275088cf65 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -19,12 +19,16 @@
 #define _ATYPE_
 #define _ATYPE32_
 #define _ATYPE64_
-#define _LLCONST_(x)    x
+#define _CONST64_(x)    x
 #else
 #define _ATYPE_         __PTRDIFF_TYPE__
 #define _ATYPE32_       int
-#define _ATYPE64_       long long
-#define _LLCONST_(x)    x ## LL
+#define _ATYPE64_       __s64
+#ifdef CONFIG_64BIT
+#define _CONST64_(x)    x ## L
+#else
+#define _CONST64_(x)    x ## LL
+#endif
 #endif
 
 /*
@@ -48,7 +52,7 @@
  */
 #define CPHYSADDR(a)            ((_ACAST32_(a)) & 0x1fffffff)
 #define XPHYSADDR(a)            ((_ACAST64_(a)) &                       \
-                                 _LLCONST_(0x000000ffffffffff))
+                                 _CONST64_(0x000000ffffffffff))
 
 #ifdef CONFIG_64BIT
 
@@ -57,14 +61,14 @@
  * The compatibility segments use the full 64-bit sign extended value.  Note
  * the R8000 doesn't have them so don't reference these in generic MIPS code.
  */
-#define XKUSEG                  _LLCONST_(0x0000000000000000)
-#define XKSSEG                  _LLCONST_(0x4000000000000000)
-#define XKPHYS                  _LLCONST_(0x8000000000000000)
-#define XKSEG                   _LLCONST_(0xc000000000000000)
-#define CKSEG0                  _LLCONST_(0xffffffff80000000)
-#define CKSEG1                  _LLCONST_(0xffffffffa0000000)
-#define CKSSEG                  _LLCONST_(0xffffffffc0000000)
-#define CKSEG3                  _LLCONST_(0xffffffffe0000000)
+#define XKUSEG                  _CONST64_(0x0000000000000000)
+#define XKSSEG                  _CONST64_(0x4000000000000000)
+#define XKPHYS                  _CONST64_(0x8000000000000000)
+#define XKSEG                   _CONST64_(0xc000000000000000)
+#define CKSEG0                  _CONST64_(0xffffffff80000000)
+#define CKSEG1                  _CONST64_(0xffffffffa0000000)
+#define CKSSEG                  _CONST64_(0xffffffffc0000000)
+#define CKSEG3                  _CONST64_(0xffffffffe0000000)
 
 #define CKSEG0ADDR(a)           (CPHYSADDR(a) | CKSEG0)
 #define CKSEG1ADDR(a)           (CPHYSADDR(a) | CKSEG1)
@@ -122,7 +126,7 @@
 #define PHYS_TO_XKSEG_UNCACHED(p)       PHYS_TO_XKPHYS(K_CALG_UNCACHED,(p))
 #define PHYS_TO_XKSEG_CACHED(p)         PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE,(p))
 #define XKPHYS_TO_PHYS(p)               ((p) & TO_PHYS_MASK)
-#define PHYS_TO_XKPHYS(cm,a)            (_LLCONST_(0x8000000000000000) | \
+#define PHYS_TO_XKPHYS(cm,a)            (_CONST64_(0x8000000000000000) | \
                                          ((cm)<<59) | (a))
 
 #if defined (CONFIG_CPU_R4300)                                          \
@@ -132,20 +136,20 @@
     || defined (CONFIG_CPU_NEVADA)                                      \
     || defined (CONFIG_CPU_TX49XX)                                      \
     || defined (CONFIG_CPU_MIPS64)
-#define TO_PHYS_MASK    _LLCONST_(0x0000000fffffffff)   /* 2^^36 - 1 */
+#define TO_PHYS_MASK    _CONST64_(0x0000000fffffffff)   /* 2^^36 - 1 */
 #endif
 
 #if defined (CONFIG_CPU_R8000)
 /* We keep KUSIZE consistent with R4000 for now (2^^40) instead of (2^^48) */
-#define TO_PHYS_MASK    _LLCONST_(0x000000ffffffffff)   /* 2^^40 - 1 */
+#define TO_PHYS_MASK    _CONST64_(0x000000ffffffffff)   /* 2^^40 - 1 */
 #endif
 
 #if defined (CONFIG_CPU_R10000)
-#define TO_PHYS_MASK    _LLCONST_(0x000000ffffffffff)   /* 2^^40 - 1 */
+#define TO_PHYS_MASK    _CONST64_(0x000000ffffffffff)   /* 2^^40 - 1 */
 #endif
 
 #if defined(CONFIG_CPU_SB1) || defined(CONFIG_CPU_SB1A)
-#define TO_PHYS_MASK    _LLCONST_(0x00000fffffffffff)   /* 2^^44 - 1 */
+#define TO_PHYS_MASK    _CONST64_(0x00000fffffffffff)   /* 2^^44 - 1 */
 #endif
 
 #ifndef CONFIG_CPU_R8000
@@ -155,7 +159,7 @@
  * in order to catch bugs in the source code.
  */
 
-#define COMPAT_K1BASE32         _LLCONST_(0xffffffffa0000000)
+#define COMPAT_K1BASE32         _CONST64_(0xffffffffa0000000)
 #define PHYS_TO_COMPATK1(x)     ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
 
 #endif