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authorGreg Ungerer <gerg@snapgear.com>2006-06-25 20:33:10 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-25 20:43:33 -0400
commitdf8fbe1e7f250b157c5815a005a9650548315d1f (patch)
treed6c10c9fd138c6583fb5688ecbad79d4751f0a57 /include/asm-m68knommu
parent76aa698f331475147825ae135eae98bfd457825b (diff)
[PATCH] m68knommu: add ColdFire 532x cache init
Add cache init support for the new ColdFire 532x CPU family. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m68knommu')
-rw-r--r--include/asm-m68knommu/mcfcache.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
index 45d1ac57ea82..7b61a8a529f5 100644
--- a/include/asm-m68knommu/mcfcache.h
+++ b/include/asm-m68knommu/mcfcache.h
@@ -92,6 +92,21 @@
92.endm 92.endm
93#endif /* CONFIG_M5249 || CONFIG_M5307 */ 93#endif /* CONFIG_M5249 || CONFIG_M5307 */
94 94
95#if defined(CONFIG_M532x)
96.macro CACHE_ENABLE
97 movel #0x01000000,%d0 /* invalidate cache cmd */
98 movec %d0,%CACR /* do invalidate cache */
99 nop
100 movel #0x4001C000,%d0 /* set SDRAM cached (write-thru) */
101 movec %d0,%ACR0
102 movel #0x00000000,%d0 /* no other regions cached */
103 movec %d0,%ACR1
104 movel #0x80000200,%d0 /* setup cache mask */
105 movec %d0,%CACR /* enable cache */
106 nop
107.endm
108#endif /* CONFIG_M532x */
109
95#if defined(CONFIG_M5407) 110#if defined(CONFIG_M5407)
96/* 111/*
97 * Version 4 cores have a true harvard style separate instruction 112 * Version 4 cores have a true harvard style separate instruction