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authorGreg Ungerer <gerg@snapgear.com>2006-06-25 20:58:09 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 00:04:24 -0400
commit31f4fde38c5027ca05941db4a05c163d6314278e (patch)
treecebb2e24cd98ec55109c4c0b9119199db89c60a9 /include/asm-m68knommu
parente648cd2688547516f86709b1d00ad4f8b618d635 (diff)
[PATCH] m68knommu: configurable frequency selection header
Remove list of fixed clock frequency options used for configuring master clock, and make field an int. Much more flexible this way, no need to add more options for every new used freqency. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m68knommu')
-rw-r--r--include/asm-m68knommu/coldfire.h76
1 files changed, 17 insertions, 59 deletions
diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h
index 2fabca91df83..83a9fa4e618a 100644
--- a/include/asm-m68knommu/coldfire.h
+++ b/include/asm-m68knommu/coldfire.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * coldfire.h -- Motorola ColdFire CPU sepecific defines 4 * coldfire.h -- Motorola ColdFire CPU sepecific defines
5 * 5 *
6 * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com) 6 * (C) Copyright 1999-2006, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2000, Lineo (www.lineo.com) 7 * (C) Copyright 2000, Lineo (www.lineo.com)
8 */ 8 */
9 9
@@ -14,6 +14,19 @@
14 14
15 15
16/* 16/*
17 * Define master clock frequency. This is essentially done at config
18 * time now. No point enumerating dozens of possible clock options
19 * here. Also the peripheral clock (bus clock) divide ratio is set
20 * at config time too.
21 */
22#ifdef CONFIG_CLOCK_SET
23#define MCF_CLK CONFIG_CLOCK_FREQ
24#define MCF_BUSCLK (CONFIG_CLOCK_FREQ / CONFIG_CLOCK_DIV)
25#else
26#error "Don't know what your ColdFire CPU clock frequency is??"
27#endif
28
29/*
17 * Define the processor support peripherals base address. 30 * Define the processor support peripherals base address.
18 * This is generally setup by the boards start up code. 31 * This is generally setup by the boards start up code.
19 */ 32 */
@@ -29,64 +42,9 @@
29 defined(CONFIG_M520x) 42 defined(CONFIG_M520x)
30#undef MCF_MBAR 43#undef MCF_MBAR
31#define MCF_MBAR MCF_IPSBAR 44#define MCF_MBAR MCF_IPSBAR
32#endif 45#elif defined(CONFIG_M532x)
33 46#undef MCF_MBAR
34/* 47#define MCF_MBAR 0x00000000
35 * Define master clock frequency.
36 */
37#if defined(CONFIG_CLOCK_11MHz)
38#define MCF_CLK 11289600
39#elif defined(CONFIG_CLOCK_16MHz)
40#define MCF_CLK 16000000
41#elif defined(CONFIG_CLOCK_20MHz)
42#define MCF_CLK 20000000
43#elif defined(CONFIG_CLOCK_24MHz)
44#define MCF_CLK 24000000
45#elif defined(CONFIG_CLOCK_25MHz)
46#define MCF_CLK 25000000
47#elif defined(CONFIG_CLOCK_33MHz)
48#define MCF_CLK 33000000
49#elif defined(CONFIG_CLOCK_40MHz)
50#define MCF_CLK 40000000
51#elif defined(CONFIG_CLOCK_45MHz)
52#define MCF_CLK 45000000
53#elif defined(CONFIG_CLOCK_48MHz)
54#define MCF_CLK 48000000
55#elif defined(CONFIG_CLOCK_50MHz)
56#define MCF_CLK 50000000
57#elif defined(CONFIG_CLOCK_54MHz)
58#define MCF_CLK 54000000
59#elif defined(CONFIG_CLOCK_60MHz)
60#define MCF_CLK 60000000
61#elif defined(CONFIG_CLOCK_62_5MHz)
62#define MCF_CLK 62500000
63#elif defined(CONFIG_CLOCK_64MHz)
64#define MCF_CLK 64000000
65#elif defined(CONFIG_CLOCK_66MHz)
66#define MCF_CLK 66000000
67#elif defined(CONFIG_CLOCK_70MHz)
68#define MCF_CLK 70000000
69#elif defined(CONFIG_CLOCK_100MHz)
70#define MCF_CLK 100000000
71#elif defined(CONFIG_CLOCK_140MHz)
72#define MCF_CLK 140000000
73#elif defined(CONFIG_CLOCK_150MHz)
74#define MCF_CLK 150000000
75#elif defined(CONFIG_CLOCK_166MHz)
76#define MCF_CLK 166000000
77#else
78#error "Don't know what your ColdFire CPU clock frequency is??"
79#endif
80
81/*
82 * One some ColdFire family members the bus clock (used by internal
83 * peripherals) is not the same as the CPU clock.
84 */
85#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
86 defined(CONFIG_M520x)
87#define MCF_BUSCLK (MCF_CLK / 2)
88#else
89#define MCF_BUSCLK MCF_CLK
90#endif 48#endif
91 49
92/****************************************************************************/ 50/****************************************************************************/