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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-m68knommu/mcftimer.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-m68knommu/mcftimer.h')
-rw-r--r--include/asm-m68knommu/mcftimer.h85
1 files changed, 85 insertions, 0 deletions
diff --git a/include/asm-m68knommu/mcftimer.h b/include/asm-m68knommu/mcftimer.h
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+++ b/include/asm-m68knommu/mcftimer.h
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1/****************************************************************************/
2
3/*
4 * mcftimer.h -- ColdFire internal TIMER support defines.
5 *
6 * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
8 */
9
10/****************************************************************************/
11#ifndef mcftimer_h
12#define mcftimer_h
13/****************************************************************************/
14
15#include <linux/config.h>
16
17/*
18 * Get address specific defines for this ColdFire member.
19 */
20#if defined(CONFIG_M5204) || defined(CONFIG_M5206) || defined(CONFIG_M5206e)
21#define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */
22#define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */
23#elif defined(CONFIG_M5272)
24#define MCFTIMER_BASE1 0x200 /* Base address of TIMER1 */
25#define MCFTIMER_BASE2 0x220 /* Base address of TIMER2 */
26#define MCFTIMER_BASE3 0x240 /* Base address of TIMER4 */
27#define MCFTIMER_BASE4 0x260 /* Base address of TIMER3 */
28#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
29#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
30#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
31#endif
32
33
34/*
35 * Define the TIMER register set addresses.
36 */
37#define MCFTIMER_TMR 0x00 /* Timer Mode reg (r/w) */
38#define MCFTIMER_TRR 0x02 /* Timer Reference (r/w) */
39#define MCFTIMER_TCR 0x04 /* Timer Capture reg (r/w) */
40#define MCFTIMER_TCN 0x06 /* Timer Counter reg (r/w) */
41#define MCFTIMER_TER 0x11 /* Timer Event reg (r/w) */
42
43struct mcftimer {
44 unsigned short tmr; /* Timer Mode reg (r/w) */
45 unsigned short reserved1;
46 unsigned short trr; /* Timer Reference (r/w) */
47 unsigned short reserved2;
48 unsigned short tcr; /* Timer Capture reg (r/w) */
49 unsigned short reserved3;
50 unsigned short tcn; /* Timer Counter reg (r/w) */
51 unsigned short reserved4;
52 unsigned char reserved5;
53 unsigned char ter; /* Timer Event reg (r/w) */
54} __attribute__((packed));
55
56/*
57 * Bit definitions for the Timer Mode Register (TMR).
58 * Register bit flags are common accross ColdFires.
59 */
60#define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */
61#define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */
62#define MCFTIMER_TMR_ANYCE 0x00c0 /* Capture any edge */
63#define MCFTIMER_TMR_FALLCE 0x0080 /* Capture fallingedge */
64#define MCFTIMER_TMR_RISECE 0x0040 /* Capture rising edge */
65#define MCFTIMER_TMR_ENOM 0x0020 /* Enable output toggle */
66#define MCFTIMER_TMR_DISOM 0x0000 /* Do single output pulse */
67#define MCFTIMER_TMR_ENORI 0x0010 /* Enable ref interrupt */
68#define MCFTIMER_TMR_DISORI 0x0000 /* Disable ref interrupt */
69#define MCFTIMER_TMR_RESTART 0x0008 /* Restart counter */
70#define MCFTIMER_TMR_FREERUN 0x0000 /* Free running counter */
71#define MCFTIMER_TMR_CLKTIN 0x0006 /* Input clock is TIN */
72#define MCFTIMER_TMR_CLK16 0x0004 /* Input clock is /16 */
73#define MCFTIMER_TMR_CLK1 0x0002 /* Input clock is /1 */
74#define MCFTIMER_TMR_CLKSTOP 0x0000 /* Stop counter */
75#define MCFTIMER_TMR_ENABLE 0x0001 /* Enable timer */
76#define MCFTIMER_TMR_DISABLE 0x0000 /* Disable timer */
77
78/*
79 * Bit definitions for the Timer Event Registers (TER).
80 */
81#define MCFTIMER_TER_CAP 0x01 /* Capture event */
82#define MCFTIMER_TER_REF 0x02 /* Refernece event */
83
84/****************************************************************************/
85#endif /* mcftimer_h */