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authorGreg Ungerer <gerg@snapgear.com>2006-06-25 20:33:10 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-25 20:43:33 -0400
commitb671b653da35cd38897c7b19e9baed64e7a9e1a1 (patch)
tree1be02e974a212499302d02514af5e82ea122377d /include/asm-m68knommu/mcfpit.h
parent2082b477dc7e9d5b3f773a36aae2dbc55b4263c2 (diff)
[PATCH] m68knommu: read/write register access for PIT timer
Modify the m68knommu/ColdFire PIT timer code to use register offsets with raw_read/raw_write access, instead of a mapped struct. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m68knommu/mcfpit.h')
-rw-r--r--include/asm-m68knommu/mcfpit.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h
index 0d2672dd518a..f570cf64fd29 100644
--- a/include/asm-m68knommu/mcfpit.h
+++ b/include/asm-m68knommu/mcfpit.h
@@ -28,11 +28,9 @@
28/* 28/*
29 * Define the PIT timer register set addresses. 29 * Define the PIT timer register set addresses.
30 */ 30 */
31struct mcfpit { 31#define MCFPIT_PCSR 0x0 /* PIT control register */
32 unsigned short pcsr; /* PIT control and status */ 32#define MCFPIT_PMR 0x2 /* PIT modulus register */
33 unsigned short pmr; /* PIT modulus register */ 33#define MCFPIT_PCNTR 0x4 /* PIT count register */
34 unsigned short pcntr; /* PIT count register */
35} __attribute__((packed));
36 34
37/* 35/*
38 * Bit definitions for the PIT Control and Status register. 36 * Bit definitions for the PIT Control and Status register.