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authorGreg Ungerer <gerg@uclinux.org>2008-07-31 00:38:07 -0400
committerGreg Ungerer <gerg@uclinux.org>2008-08-07 01:36:16 -0400
commit58750139001bae11a1f9b074f3a9c774fecf5ba8 (patch)
treeecdafd4d8c3d2ef2cee7e512b7310552863a617c /include/asm-m68knommu/mcfne.h
parent685d87f7ccc649ab92b55e18e507a65d0e694eb9 (diff)
Move all of include/asm-m68knommu to arch/m68knommu/include/asm.
With the current kbuild infrastructure in place no other changes are required for this to work. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'include/asm-m68knommu/mcfne.h')
-rw-r--r--include/asm-m68knommu/mcfne.h325
1 files changed, 0 insertions, 325 deletions
diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h
deleted file mode 100644
index 431f63aadd0e..000000000000
--- a/include/asm-m68knommu/mcfne.h
+++ /dev/null
@@ -1,325 +0,0 @@
1/****************************************************************************/
2
3/*
4 * mcfne.h -- NE2000 in ColdFire eval boards.
5 *
6 * (C) Copyright 1999-2000, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2000, Lineo (www.lineo.com)
8 * (C) Copyright 2001, SnapGear (www.snapgear.com)
9 *
10 * 19990409 David W. Miller Converted from m5206ne.h for 5307 eval board
11 *
12 * Hacked support for m5206e Cadre III evaluation board
13 * Fred Stevens (fred.stevens@pemstar.com) 13 April 1999
14 */
15
16/****************************************************************************/
17#ifndef mcfne_h
18#define mcfne_h
19/****************************************************************************/
20
21
22/*
23 * Support for NE2000 clones devices in ColdFire based boards.
24 * Not all boards address these parts the same way, some use a
25 * direct addressing method, others use a side-band address space
26 * to access odd address registers, some require byte swapping
27 * others do not.
28 */
29#define BSWAP(w) (((w) << 8) | ((w) >> 8))
30#define RSWAP(w) (w)
31
32
33/*
34 * Define the basic hardware resources of NE2000 boards.
35 */
36
37#if defined(CONFIG_ARN5206)
38#define NE2000_ADDR 0x40000300
39#define NE2000_ODDOFFSET 0x00010000
40#define NE2000_IRQ_VECTOR 0xf0
41#define NE2000_IRQ_PRIORITY 2
42#define NE2000_IRQ_LEVEL 4
43#define NE2000_BYTE volatile unsigned short
44#endif
45
46#if defined(CONFIG_M5206eC3)
47#define NE2000_ADDR 0x40000300
48#define NE2000_ODDOFFSET 0x00010000
49#define NE2000_IRQ_VECTOR 0x1c
50#define NE2000_IRQ_PRIORITY 2
51#define NE2000_IRQ_LEVEL 4
52#define NE2000_BYTE volatile unsigned short
53#endif
54
55#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
56#define NE2000_ADDR 0x30000300
57#define NE2000_IRQ_VECTOR 25
58#define NE2000_IRQ_PRIORITY 1
59#define NE2000_IRQ_LEVEL 3
60#define NE2000_BYTE volatile unsigned char
61#endif
62
63#if defined(CONFIG_M5307C3)
64#define NE2000_ADDR 0x40000300
65#define NE2000_ODDOFFSET 0x00010000
66#define NE2000_IRQ_VECTOR 0x1b
67#define NE2000_BYTE volatile unsigned short
68#endif
69
70#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
71#define NE2000_ADDR 0x30600300
72#define NE2000_ODDOFFSET 0x00008000
73#define NE2000_IRQ_VECTOR 67
74#undef BSWAP
75#define BSWAP(w) (w)
76#define NE2000_BYTE volatile unsigned short
77#undef RSWAP
78#define RSWAP(w) (((w) << 8) | ((w) >> 8))
79#endif
80
81#if defined(CONFIG_M5307) && defined(CONFIG_NETtel)
82#define NE2000_ADDR0 0x30600300
83#define NE2000_ADDR1 0x30800300
84#define NE2000_ODDOFFSET 0x00008000
85#define NE2000_IRQ_VECTOR0 27
86#define NE2000_IRQ_VECTOR1 29
87#undef BSWAP
88#define BSWAP(w) (w)
89#define NE2000_BYTE volatile unsigned short
90#undef RSWAP
91#define RSWAP(w) (((w) << 8) | ((w) >> 8))
92#endif
93
94#if defined(CONFIG_M5307) && defined(CONFIG_SECUREEDGEMP3)
95#define NE2000_ADDR 0x30600300
96#define NE2000_ODDOFFSET 0x00008000
97#define NE2000_IRQ_VECTOR 27
98#undef BSWAP
99#define BSWAP(w) (w)
100#define NE2000_BYTE volatile unsigned short
101#undef RSWAP
102#define RSWAP(w) (((w) << 8) | ((w) >> 8))
103#endif
104
105#if defined(CONFIG_ARN5307)
106#define NE2000_ADDR 0xfe600300
107#define NE2000_ODDOFFSET 0x00010000
108#define NE2000_IRQ_VECTOR 0x1b
109#define NE2000_IRQ_PRIORITY 2
110#define NE2000_IRQ_LEVEL 3
111#define NE2000_BYTE volatile unsigned short
112#endif
113
114#if defined(CONFIG_M5407C3)
115#define NE2000_ADDR 0x40000300
116#define NE2000_ODDOFFSET 0x00010000
117#define NE2000_IRQ_VECTOR 0x1b
118#define NE2000_BYTE volatile unsigned short
119#endif
120
121/****************************************************************************/
122
123/*
124 * Side-band address space for odd address requires re-mapping
125 * many of the standard ISA access functions.
126 */
127#ifdef NE2000_ODDOFFSET
128
129#undef outb
130#undef outb_p
131#undef inb
132#undef inb_p
133#undef outsb
134#undef outsw
135#undef insb
136#undef insw
137
138#define outb ne2000_outb
139#define inb ne2000_inb
140#define outb_p ne2000_outb
141#define inb_p ne2000_inb
142#define outsb ne2000_outsb
143#define outsw ne2000_outsw
144#define insb ne2000_insb
145#define insw ne2000_insw
146
147
148#ifndef COLDFIRE_NE2000_FUNCS
149
150void ne2000_outb(unsigned int val, unsigned int addr);
151int ne2000_inb(unsigned int addr);
152void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len);
153void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len);
154void ne2000_outsb(unsigned int addr, void *vbuf, unsigned long len);
155void ne2000_outsw(unsigned int addr, void *vbuf, unsigned long len);
156
157#else
158
159/*
160 * This macro converts a conventional register address into the
161 * real memory pointer of the mapped NE2000 device.
162 * On most NE2000 implementations on ColdFire boards the chip is
163 * mapped in kinda funny, due to its ISA heritage.
164 */
165#define NE2000_PTR(addr) ((addr&0x1)?(NE2000_ODDOFFSET+addr-1):(addr))
166#define NE2000_DATA_PTR(addr) (addr)
167
168
169void ne2000_outb(unsigned int val, unsigned int addr)
170{
171 NE2000_BYTE *rp;
172
173 rp = (NE2000_BYTE *) NE2000_PTR(addr);
174 *rp = RSWAP(val);
175}
176
177int ne2000_inb(unsigned int addr)
178{
179 NE2000_BYTE *rp, val;
180
181 rp = (NE2000_BYTE *) NE2000_PTR(addr);
182 val = *rp;
183 return((int) ((NE2000_BYTE) RSWAP(val)));
184}
185
186void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len)
187{
188 NE2000_BYTE *rp, val;
189 unsigned char *buf;
190
191 buf = (unsigned char *) vbuf;
192 rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
193 for (; (len > 0); len--) {
194 val = *rp;
195 *buf++ = RSWAP(val);
196 }
197}
198
199void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len)
200{
201 volatile unsigned short *rp;
202 unsigned short w, *buf;
203
204 buf = (unsigned short *) vbuf;
205 rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
206 for (; (len > 0); len--) {
207 w = *rp;
208 *buf++ = BSWAP(w);
209 }
210}
211
212void ne2000_outsb(unsigned int addr, const void *vbuf, unsigned long len)
213{
214 NE2000_BYTE *rp, val;
215 unsigned char *buf;
216
217 buf = (unsigned char *) vbuf;
218 rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
219 for (; (len > 0); len--) {
220 val = *buf++;
221 *rp = RSWAP(val);
222 }
223}
224
225void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
226{
227 volatile unsigned short *rp;
228 unsigned short w, *buf;
229
230 buf = (unsigned short *) vbuf;
231 rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
232 for (; (len > 0); len--) {
233 w = *buf++;
234 *rp = BSWAP(w);
235 }
236}
237
238#endif /* COLDFIRE_NE2000_FUNCS */
239#endif /* NE2000_OFFOFFSET */
240
241/****************************************************************************/
242
243#ifdef COLDFIRE_NE2000_FUNCS
244
245/*
246 * Lastly the interrupt set up code...
247 * Minor differences between the different board types.
248 */
249
250#if defined(CONFIG_ARN5206)
251void ne2000_irqsetup(int irq)
252{
253 volatile unsigned char *icrp;
254
255 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
256 *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2;
257 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
258}
259#endif
260
261#if defined(CONFIG_M5206eC3)
262void ne2000_irqsetup(int irq)
263{
264 volatile unsigned char *icrp;
265
266 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
267 *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
268 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
269}
270#endif
271
272#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
273void ne2000_irqsetup(int irq)
274{
275 mcf_autovector(irq);
276}
277#endif
278
279#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
280void ne2000_irqsetup(int irq)
281{
282 volatile unsigned long *icrp;
283 volatile unsigned long *pitr;
284
285 /* The NE2000 device uses external IRQ3 */
286 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
287 *icrp = (*icrp & 0x77077777) | 0x00d00000;
288
289 pitr = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PITR);
290 *pitr = *pitr | 0x20000000;
291}
292
293void ne2000_irqack(int irq)
294{
295 volatile unsigned long *icrp;
296
297 /* The NE2000 device uses external IRQ3 */
298 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
299 *icrp = (*icrp & 0x77777777) | 0x00800000;
300}
301#endif
302
303#if defined(CONFIG_M5307) || defined(CONFIG_M5407)
304#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
305
306void ne2000_irqsetup(int irq)
307{
308 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
309 mcf_autovector(irq);
310}
311
312#else
313
314void ne2000_irqsetup(int irq)
315{
316 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
317}
318
319#endif /* ! CONFIG_NETtel || CONFIG_SECUREEDGEMP3 */
320#endif /* CONFIG_M5307 || CONFIG_M5407 */
321
322#endif /* COLDFIRE_NE2000_FUNCS */
323
324/****************************************************************************/
325#endif /* mcfne_h */
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