diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-02-04 10:58:52 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-02-04 10:58:52 -0500 |
| commit | f5bb3a5e9dcdb8435471562b6cada89525cf4df1 (patch) | |
| tree | 7b7cf9b90bacd0e2fe07cb3387516e9243f1ab66 /include/asm-m68knommu/m5307sim.h | |
| parent | 9853832c49dc1685587abeb4e1decd4be690d256 (diff) | |
| parent | 1560a79a2c2ea0c3826150da8029991d685de990 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial
* git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial: (79 commits)
Jesper Juhl is the new trivial patches maintainer
Documentation: mention email-clients.txt in SubmittingPatches
fs/binfmt_elf.c: spello fix
do_invalidatepage() comment typo fix
Documentation/filesystems/porting fixes
typo fixes in net/core/net_namespace.c
typo fix in net/rfkill/rfkill.c
typo fixes in net/sctp/sm_statefuns.c
lib/: Spelling fixes
kernel/: Spelling fixes
include/scsi/: Spelling fixes
include/linux/: Spelling fixes
include/asm-m68knommu/: Spelling fixes
include/asm-frv/: Spelling fixes
fs/: Spelling fixes
drivers/watchdog/: Spelling fixes
drivers/video/: Spelling fixes
drivers/ssb/: Spelling fixes
drivers/serial/: Spelling fixes
drivers/scsi/: Spelling fixes
...
Diffstat (limited to 'include/asm-m68knommu/m5307sim.h')
| -rw-r--r-- | include/asm-m68knommu/m5307sim.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/asm-m68knommu/m5307sim.h b/include/asm-m68knommu/m5307sim.h index d3ce550f6ef4..5886728409c0 100644 --- a/include/asm-m68knommu/m5307sim.h +++ b/include/asm-m68knommu/m5307sim.h | |||
| @@ -64,22 +64,22 @@ | |||
| 64 | #define MCFSIM_CSMR7 0xda /* CS 7 Mask reg (r/w) */ | 64 | #define MCFSIM_CSMR7 0xda /* CS 7 Mask reg (r/w) */ |
| 65 | #define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */ | 65 | #define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */ |
| 66 | #else | 66 | #else |
| 67 | #define MCFSIM_CSAR2 0x98 /* CS 2 Adress reg (r/w) */ | 67 | #define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */ |
| 68 | #define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */ | 68 | #define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */ |
| 69 | #define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */ | 69 | #define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */ |
| 70 | #define MCFSIM_CSAR3 0xa4 /* CS 3 Adress reg (r/w) */ | 70 | #define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */ |
| 71 | #define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */ | 71 | #define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */ |
| 72 | #define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */ | 72 | #define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */ |
| 73 | #define MCFSIM_CSAR4 0xb0 /* CS 4 Adress reg (r/w) */ | 73 | #define MCFSIM_CSAR4 0xb0 /* CS 4 Address reg (r/w) */ |
| 74 | #define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */ | 74 | #define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */ |
| 75 | #define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */ | 75 | #define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */ |
| 76 | #define MCFSIM_CSAR5 0xbc /* CS 5 Adress reg (r/w) */ | 76 | #define MCFSIM_CSAR5 0xbc /* CS 5 Address reg (r/w) */ |
| 77 | #define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */ | 77 | #define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */ |
| 78 | #define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */ | 78 | #define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */ |
| 79 | #define MCFSIM_CSAR6 0xc8 /* CS 6 Adress reg (r/w) */ | 79 | #define MCFSIM_CSAR6 0xc8 /* CS 6 Address reg (r/w) */ |
| 80 | #define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */ | 80 | #define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */ |
| 81 | #define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */ | 81 | #define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */ |
| 82 | #define MCFSIM_CSAR7 0xd4 /* CS 7 Adress reg (r/w) */ | 82 | #define MCFSIM_CSAR7 0xd4 /* CS 7 Address reg (r/w) */ |
| 83 | #define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */ | 83 | #define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */ |
| 84 | #define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */ | 84 | #define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */ |
| 85 | #endif /* CONFIG_OLDMASK */ | 85 | #endif /* CONFIG_OLDMASK */ |