diff options
author | Al Viro <viro@ftp.linux.org.uk> | 2007-07-27 09:19:52 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-28 22:42:21 -0400 |
commit | 986c76036adb0b12cbe1bf1ce1f75586585ee227 (patch) | |
tree | 255797fb3de85cb47994a49746b1f3192e459bb6 /include/asm-m68k/system.h | |
parent | 9873aed5a90aefb1642a85070c35088cca8b6a92 (diff) |
more include order horrors
... because somebody had added preempt.h -> list.h, resulting in
asm/system.h -> hardirq.h -> preempt.h -> list.h -> asm/system.h on m68k,
with smp_wmb() used in list.h and defined in asm/system.h below the include
of hardirq.h.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-m68k/system.h')
-rw-r--r-- | include/asm-m68k/system.h | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/include/asm-m68k/system.h b/include/asm-m68k/system.h index 198878b53a61..caa9b1663e45 100644 --- a/include/asm-m68k/system.h +++ b/include/asm-m68k/system.h | |||
@@ -46,6 +46,22 @@ asmlinkage void resume(void); | |||
46 | } while (0) | 46 | } while (0) |
47 | 47 | ||
48 | 48 | ||
49 | /* | ||
50 | * Force strict CPU ordering. | ||
51 | * Not really required on m68k... | ||
52 | */ | ||
53 | #define nop() do { asm volatile ("nop"); barrier(); } while (0) | ||
54 | #define mb() barrier() | ||
55 | #define rmb() barrier() | ||
56 | #define wmb() barrier() | ||
57 | #define read_barrier_depends() ((void)0) | ||
58 | #define set_mb(var, value) ({ (var) = (value); wmb(); }) | ||
59 | |||
60 | #define smp_mb() barrier() | ||
61 | #define smp_rmb() barrier() | ||
62 | #define smp_wmb() barrier() | ||
63 | #define smp_read_barrier_depends() ((void)0) | ||
64 | |||
49 | /* interrupt control.. */ | 65 | /* interrupt control.. */ |
50 | #if 0 | 66 | #if 0 |
51 | #define local_irq_enable() asm volatile ("andiw %0,%%sr": : "i" (ALLOWINT) : "memory") | 67 | #define local_irq_enable() asm volatile ("andiw %0,%%sr": : "i" (ALLOWINT) : "memory") |
@@ -70,23 +86,6 @@ static inline int irqs_disabled(void) | |||
70 | /* For spinlocks etc */ | 86 | /* For spinlocks etc */ |
71 | #define local_irq_save(x) ({ local_save_flags(x); local_irq_disable(); }) | 87 | #define local_irq_save(x) ({ local_save_flags(x); local_irq_disable(); }) |
72 | 88 | ||
73 | /* | ||
74 | * Force strict CPU ordering. | ||
75 | * Not really required on m68k... | ||
76 | */ | ||
77 | #define nop() do { asm volatile ("nop"); barrier(); } while (0) | ||
78 | #define mb() barrier() | ||
79 | #define rmb() barrier() | ||
80 | #define wmb() barrier() | ||
81 | #define read_barrier_depends() ((void)0) | ||
82 | #define set_mb(var, value) ({ (var) = (value); wmb(); }) | ||
83 | |||
84 | #define smp_mb() barrier() | ||
85 | #define smp_rmb() barrier() | ||
86 | #define smp_wmb() barrier() | ||
87 | #define smp_read_barrier_depends() ((void)0) | ||
88 | |||
89 | |||
90 | #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) | 89 | #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) |
91 | 90 | ||
92 | struct __xchg_dummy { unsigned long a[100]; }; | 91 | struct __xchg_dummy { unsigned long a[100]; }; |