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authorAl Viro <viro@ftp.linux.org.uk>2006-01-12 04:06:24 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-12 12:09:02 -0500
commitad9ec4f8de264903c6b5ba7ae8d8e96432188858 (patch)
tree9ae7f2625eaa777abdb6b5cb2d505361d37ae675 /include/asm-m68k/io.h
parent9a4729118c8851bce709a00eba1b3a8f1fd9ed58 (diff)
[PATCH] m68k: basic iomem annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Cc: Roman Zippel <zippel@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m68k/io.h')
-rw-r--r--include/asm-m68k/io.h49
1 files changed, 25 insertions, 24 deletions
diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h
index 6bb8b0d8f99d..dcfaa352d34c 100644
--- a/include/asm-m68k/io.h
+++ b/include/asm-m68k/io.h
@@ -24,6 +24,7 @@
24#ifdef __KERNEL__ 24#ifdef __KERNEL__
25 25
26#include <linux/config.h> 26#include <linux/config.h>
27#include <linux/compiler.h>
27#include <asm/raw_io.h> 28#include <asm/raw_io.h>
28#include <asm/virtconvert.h> 29#include <asm/virtconvert.h>
29 30
@@ -120,68 +121,68 @@ extern int isa_sex;
120 * be compiled in so the case statement will be optimised away 121 * be compiled in so the case statement will be optimised away
121 */ 122 */
122 123
123static inline u8 *isa_itb(unsigned long addr) 124static inline u8 __iomem *isa_itb(unsigned long addr)
124{ 125{
125 switch(ISA_TYPE) 126 switch(ISA_TYPE)
126 { 127 {
127#ifdef CONFIG_Q40 128#ifdef CONFIG_Q40
128 case Q40_ISA: return (u8 *)Q40_ISA_IO_B(addr); 129 case Q40_ISA: return (u8 __iomem *)Q40_ISA_IO_B(addr);
129#endif 130#endif
130#ifdef CONFIG_GG2 131#ifdef CONFIG_GG2
131 case GG2_ISA: return (u8 *)GG2_ISA_IO_B(addr); 132 case GG2_ISA: return (u8 __iomem *)GG2_ISA_IO_B(addr);
132#endif 133#endif
133#ifdef CONFIG_AMIGA_PCMCIA 134#ifdef CONFIG_AMIGA_PCMCIA
134 case AG_ISA: return (u8 *)AG_ISA_IO_B(addr); 135 case AG_ISA: return (u8 __iomem *)AG_ISA_IO_B(addr);
135#endif 136#endif
136 default: return 0; /* avoid warnings, just in case */ 137 default: return NULL; /* avoid warnings, just in case */
137 } 138 }
138} 139}
139static inline u16 *isa_itw(unsigned long addr) 140static inline u16 __iomem *isa_itw(unsigned long addr)
140{ 141{
141 switch(ISA_TYPE) 142 switch(ISA_TYPE)
142 { 143 {
143#ifdef CONFIG_Q40 144#ifdef CONFIG_Q40
144 case Q40_ISA: return (u16 *)Q40_ISA_IO_W(addr); 145 case Q40_ISA: return (u16 __iomem *)Q40_ISA_IO_W(addr);
145#endif 146#endif
146#ifdef CONFIG_GG2 147#ifdef CONFIG_GG2
147 case GG2_ISA: return (u16 *)GG2_ISA_IO_W(addr); 148 case GG2_ISA: return (u16 __iomem *)GG2_ISA_IO_W(addr);
148#endif 149#endif
149#ifdef CONFIG_AMIGA_PCMCIA 150#ifdef CONFIG_AMIGA_PCMCIA
150 case AG_ISA: return (u16 *)AG_ISA_IO_W(addr); 151 case AG_ISA: return (u16 __iomem *)AG_ISA_IO_W(addr);
151#endif 152#endif
152 default: return 0; /* avoid warnings, just in case */ 153 default: return NULL; /* avoid warnings, just in case */
153 } 154 }
154} 155}
155static inline u8 *isa_mtb(unsigned long addr) 156static inline u8 __iomem *isa_mtb(unsigned long addr)
156{ 157{
157 switch(ISA_TYPE) 158 switch(ISA_TYPE)
158 { 159 {
159#ifdef CONFIG_Q40 160#ifdef CONFIG_Q40
160 case Q40_ISA: return (u8 *)Q40_ISA_MEM_B(addr); 161 case Q40_ISA: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
161#endif 162#endif
162#ifdef CONFIG_GG2 163#ifdef CONFIG_GG2
163 case GG2_ISA: return (u8 *)GG2_ISA_MEM_B(addr); 164 case GG2_ISA: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
164#endif 165#endif
165#ifdef CONFIG_AMIGA_PCMCIA 166#ifdef CONFIG_AMIGA_PCMCIA
166 case AG_ISA: return (u8 *)addr; 167 case AG_ISA: return (u8 __iomem *)addr;
167#endif 168#endif
168 default: return 0; /* avoid warnings, just in case */ 169 default: return NULL; /* avoid warnings, just in case */
169 } 170 }
170} 171}
171static inline u16 *isa_mtw(unsigned long addr) 172static inline u16 __iomem *isa_mtw(unsigned long addr)
172{ 173{
173 switch(ISA_TYPE) 174 switch(ISA_TYPE)
174 { 175 {
175#ifdef CONFIG_Q40 176#ifdef CONFIG_Q40
176 case Q40_ISA: return (u16 *)Q40_ISA_MEM_W(addr); 177 case Q40_ISA: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
177#endif 178#endif
178#ifdef CONFIG_GG2 179#ifdef CONFIG_GG2
179 case GG2_ISA: return (u16 *)GG2_ISA_MEM_W(addr); 180 case GG2_ISA: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
180#endif 181#endif
181#ifdef CONFIG_AMIGA_PCMCIA 182#ifdef CONFIG_AMIGA_PCMCIA
182 case AG_ISA: return (u16 *)addr; 183 case AG_ISA: return (u16 __iomem *)addr;
183#endif 184#endif
184 default: return 0; /* avoid warnings, just in case */ 185 default: return NULL; /* avoid warnings, just in case */
185 } 186 }
186} 187}
187 188
@@ -326,20 +327,20 @@ static inline void isa_delay(void)
326 327
327#define mmiowb() 328#define mmiowb()
328 329
329static inline void *ioremap(unsigned long physaddr, unsigned long size) 330static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
330{ 331{
331 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 332 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
332} 333}
333static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) 334static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
334{ 335{
335 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 336 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
336} 337}
337static inline void *ioremap_writethrough(unsigned long physaddr, 338static inline void __iomem *ioremap_writethrough(unsigned long physaddr,
338 unsigned long size) 339 unsigned long size)
339{ 340{
340 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); 341 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
341} 342}
342static inline void *ioremap_fullcache(unsigned long physaddr, 343static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
343 unsigned long size) 344 unsigned long size)
344{ 345{
345 return __ioremap(physaddr, size, IOMAP_FULL_CACHING); 346 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);