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authorHirokazu Takata <takata@linux-m32r.org>2006-04-19 01:21:30 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-04-19 12:13:50 -0400
commit0d34c86c3b75e5fd7cde15c965349b0104e06e53 (patch)
tree13092afb5f94f45429ff04c24ce390ddf7f6a7b4 /include/asm-m32r/mappi3
parentfa372810e51979c5044e036a34015845e9c6aedd (diff)
[PATCH] m32r: mappi3 reboot support
Here is a patch to support a reboot function for M3A-2170(Mappi-III) evaluation board. Signed-off-by: Hayato Fujiwara <fujiwara@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m32r/mappi3')
-rw-r--r--include/asm-m32r/mappi3/mappi3_pld.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/include/asm-m32r/mappi3/mappi3_pld.h b/include/asm-m32r/mappi3/mappi3_pld.h
index 1d3c25d61bcb..031369a7afc8 100644
--- a/include/asm-m32r/mappi3/mappi3_pld.h
+++ b/include/asm-m32r/mappi3/mappi3_pld.h
@@ -53,16 +53,14 @@
53/* Power Control of MMC and CF */ 53/* Power Control of MMC and CF */
54#define PLD_CPCR __reg16(PLD_BASE + 0x14000) 54#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
55 55
56 56/* ICU */
57/*==== ICU ====*/ 57#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
58#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */ 58#define M32R_IRQ_I2C (28) /* I2C-BUS */
59#define M32R_IRQ_I2C (28) /* I2C-BUS */ 59#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
60#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */ 60#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */
61#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert */ 61#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */
62#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */ 62#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ 63#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
65
66 64
67#if 0 65#if 0
68/* LED Control 66/* LED Control
@@ -97,7 +95,6 @@
97#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) 95#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
98#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) 96#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
99 97
100
101#if 0 98#if 0
102/* RTC */ 99/* RTC */
103#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) 100#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
@@ -140,4 +137,7 @@
140 137
141#endif 138#endif
142 139
140/* Reset Control */
141#define PLD_REBOOT __reg16(PLD_BASE + 0x38000)
142
143#endif /* _MAPPI3_PLD.H */ 143#endif /* _MAPPI3_PLD.H */