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authorHirokazu Takata <takata@linux-m32r.org>2008-11-27 12:46:48 -0500
committerHirokazu Takata <takata@linux-m32r.org>2009-04-16 21:05:01 -0400
commitfe4e719d82c4052751d2287de4bd18bd04e93685 (patch)
tree3a120e25626becf138f523a356422c0cdf9804c7 /include/asm-m32r/cacheflush.h
parent20d9207849d5abe60461841b3c3724f6e7c9d33e (diff)
m32r: move include/asm-m32r headers to arch/m32r/include/asm
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Diffstat (limited to 'include/asm-m32r/cacheflush.h')
-rw-r--r--include/asm-m32r/cacheflush.h69
1 files changed, 0 insertions, 69 deletions
diff --git a/include/asm-m32r/cacheflush.h b/include/asm-m32r/cacheflush.h
deleted file mode 100644
index 78587c958146..000000000000
--- a/include/asm-m32r/cacheflush.h
+++ /dev/null
@@ -1,69 +0,0 @@
1#ifndef _ASM_M32R_CACHEFLUSH_H
2#define _ASM_M32R_CACHEFLUSH_H
3
4#include <linux/mm.h>
5
6extern void _flush_cache_all(void);
7extern void _flush_cache_copyback_all(void);
8
9#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
10#define flush_cache_all() do { } while (0)
11#define flush_cache_mm(mm) do { } while (0)
12#define flush_cache_dup_mm(mm) do { } while (0)
13#define flush_cache_range(vma, start, end) do { } while (0)
14#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
15#define flush_dcache_page(page) do { } while (0)
16#define flush_dcache_mmap_lock(mapping) do { } while (0)
17#define flush_dcache_mmap_unlock(mapping) do { } while (0)
18#ifndef CONFIG_SMP
19#define flush_icache_range(start, end) _flush_cache_copyback_all()
20#define flush_icache_page(vma,pg) _flush_cache_copyback_all()
21#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
22#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
23#else /* CONFIG_SMP */
24extern void smp_flush_cache_all(void);
25#define flush_icache_range(start, end) smp_flush_cache_all()
26#define flush_icache_page(vma,pg) smp_flush_cache_all()
27#define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
28#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
29#endif /* CONFIG_SMP */
30#elif defined(CONFIG_CHIP_M32102)
31#define flush_cache_all() do { } while (0)
32#define flush_cache_mm(mm) do { } while (0)
33#define flush_cache_dup_mm(mm) do { } while (0)
34#define flush_cache_range(vma, start, end) do { } while (0)
35#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
36#define flush_dcache_page(page) do { } while (0)
37#define flush_dcache_mmap_lock(mapping) do { } while (0)
38#define flush_dcache_mmap_unlock(mapping) do { } while (0)
39#define flush_icache_range(start, end) _flush_cache_all()
40#define flush_icache_page(vma,pg) _flush_cache_all()
41#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
42#define flush_cache_sigtramp(addr) _flush_cache_all()
43#else
44#define flush_cache_all() do { } while (0)
45#define flush_cache_mm(mm) do { } while (0)
46#define flush_cache_dup_mm(mm) do { } while (0)
47#define flush_cache_range(vma, start, end) do { } while (0)
48#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
49#define flush_dcache_page(page) do { } while (0)
50#define flush_dcache_mmap_lock(mapping) do { } while (0)
51#define flush_dcache_mmap_unlock(mapping) do { } while (0)
52#define flush_icache_range(start, end) do { } while (0)
53#define flush_icache_page(vma,pg) do { } while (0)
54#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
55#define flush_cache_sigtramp(addr) do { } while (0)
56#endif /* CONFIG_CHIP_* */
57
58#define flush_cache_vmap(start, end) do { } while (0)
59#define flush_cache_vunmap(start, end) do { } while (0)
60
61#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
62do { \
63 memcpy(dst, src, len); \
64 flush_icache_user_range(vma, page, vaddr, len); \
65} while (0)
66#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
67 memcpy(dst, src, len)
68
69#endif /* _ASM_M32R_CACHEFLUSH_H */