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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-m32r/cacheflush.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-m32r/cacheflush.h')
-rw-r--r--include/asm-m32r/cacheflush.h68
1 files changed, 68 insertions, 0 deletions
diff --git a/include/asm-m32r/cacheflush.h b/include/asm-m32r/cacheflush.h
new file mode 100644
index 000000000000..46fc4c325108
--- /dev/null
+++ b/include/asm-m32r/cacheflush.h
@@ -0,0 +1,68 @@
1#ifndef _ASM_M32R_CACHEFLUSH_H
2#define _ASM_M32R_CACHEFLUSH_H
3
4#include <linux/config.h>
5#include <linux/mm.h>
6
7extern void _flush_cache_all(void);
8extern void _flush_cache_copyback_all(void);
9
10#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP)
11#define flush_cache_all() do { } while (0)
12#define flush_cache_mm(mm) do { } while (0)
13#define flush_cache_range(vma, start, end) do { } while (0)
14#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
15#define flush_dcache_page(page) do { } while (0)
16#define flush_dcache_mmap_lock(mapping) do { } while (0)
17#define flush_dcache_mmap_unlock(mapping) do { } while (0)
18#ifndef CONFIG_SMP
19#define flush_icache_range(start, end) _flush_cache_copyback_all()
20#define flush_icache_page(vma,pg) _flush_cache_copyback_all()
21#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
22#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
23#else /* CONFIG_SMP */
24extern void smp_flush_cache_all(void);
25#define flush_icache_range(start, end) smp_flush_cache_all()
26#define flush_icache_page(vma,pg) smp_flush_cache_all()
27#define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
28#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
29#endif /* CONFIG_SMP */
30#elif defined(CONFIG_CHIP_M32102)
31#define flush_cache_all() do { } while (0)
32#define flush_cache_mm(mm) do { } while (0)
33#define flush_cache_range(vma, start, end) do { } while (0)
34#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
35#define flush_dcache_page(page) do { } while (0)
36#define flush_dcache_mmap_lock(mapping) do { } while (0)
37#define flush_dcache_mmap_unlock(mapping) do { } while (0)
38#define flush_icache_range(start, end) _flush_cache_all()
39#define flush_icache_page(vma,pg) _flush_cache_all()
40#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
41#define flush_cache_sigtramp(addr) _flush_cache_all()
42#else
43#define flush_cache_all() do { } while (0)
44#define flush_cache_mm(mm) do { } while (0)
45#define flush_cache_range(vma, start, end) do { } while (0)
46#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
47#define flush_dcache_page(page) do { } while (0)
48#define flush_dcache_mmap_lock(mapping) do { } while (0)
49#define flush_dcache_mmap_unlock(mapping) do { } while (0)
50#define flush_icache_range(start, end) do { } while (0)
51#define flush_icache_page(vma,pg) do { } while (0)
52#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
53#define flush_cache_sigtramp(addr) do { } while (0)
54#endif /* CONFIG_CHIP_* */
55
56#define flush_cache_vmap(start, end) do { } while (0)
57#define flush_cache_vunmap(start, end) do { } while (0)
58
59#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
60do { \
61 memcpy(dst, src, len); \
62 flush_icache_user_range(vma, page, vaddr, len); \
63} while (0)
64#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
65 memcpy(dst, src, len)
66
67#endif /* _ASM_M32R_CACHEFLUSH_H */
68