diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-12-12 12:14:57 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-13 12:27:08 -0500 |
commit | ec8c0446b6e2b67b5c8813eb517f4bf00efa99a9 (patch) | |
tree | e7c12d7c486c958a5e38888b41cfcd6a558f1aff /include/asm-m32r/cacheflush.h | |
parent | bcd022801ee514e28c32837f0b3ce18c775f1a7b (diff) |
[PATCH] Optimize D-cache alias handling on fork
Virtually index, physically tagged cache architectures can get away
without cache flushing when forking. This patch adds a new cache
flushing function flush_cache_dup_mm(struct mm_struct *) which for the
moment I've implemented to do the same thing on all architectures
except on MIPS where it's a no-op.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m32r/cacheflush.h')
-rw-r--r-- | include/asm-m32r/cacheflush.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-m32r/cacheflush.h b/include/asm-m32r/cacheflush.h index 8b261b49149e..56961a9511b2 100644 --- a/include/asm-m32r/cacheflush.h +++ b/include/asm-m32r/cacheflush.h | |||
@@ -9,6 +9,7 @@ extern void _flush_cache_copyback_all(void); | |||
9 | #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) | 9 | #if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) |
10 | #define flush_cache_all() do { } while (0) | 10 | #define flush_cache_all() do { } while (0) |
11 | #define flush_cache_mm(mm) do { } while (0) | 11 | #define flush_cache_mm(mm) do { } while (0) |
12 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
12 | #define flush_cache_range(vma, start, end) do { } while (0) | 13 | #define flush_cache_range(vma, start, end) do { } while (0) |
13 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | 14 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) |
14 | #define flush_dcache_page(page) do { } while (0) | 15 | #define flush_dcache_page(page) do { } while (0) |
@@ -29,6 +30,7 @@ extern void smp_flush_cache_all(void); | |||
29 | #elif defined(CONFIG_CHIP_M32102) | 30 | #elif defined(CONFIG_CHIP_M32102) |
30 | #define flush_cache_all() do { } while (0) | 31 | #define flush_cache_all() do { } while (0) |
31 | #define flush_cache_mm(mm) do { } while (0) | 32 | #define flush_cache_mm(mm) do { } while (0) |
33 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
32 | #define flush_cache_range(vma, start, end) do { } while (0) | 34 | #define flush_cache_range(vma, start, end) do { } while (0) |
33 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | 35 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) |
34 | #define flush_dcache_page(page) do { } while (0) | 36 | #define flush_dcache_page(page) do { } while (0) |
@@ -41,6 +43,7 @@ extern void smp_flush_cache_all(void); | |||
41 | #else | 43 | #else |
42 | #define flush_cache_all() do { } while (0) | 44 | #define flush_cache_all() do { } while (0) |
43 | #define flush_cache_mm(mm) do { } while (0) | 45 | #define flush_cache_mm(mm) do { } while (0) |
46 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
44 | #define flush_cache_range(vma, start, end) do { } while (0) | 47 | #define flush_cache_range(vma, start, end) do { } while (0) |
45 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | 48 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) |
46 | #define flush_dcache_page(page) do { } while (0) | 49 | #define flush_dcache_page(page) do { } while (0) |