diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-05-11 08:44:27 -0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-05-11 08:44:31 -0400 |
| commit | 41fb454ebe6024f5c1e3b3cbc0abc0da762e7b51 (patch) | |
| tree | 51c50bcb67a5039448ddfa1869d7948cab1217e9 /include/asm-m32r/cachectl.h | |
| parent | 19c1a6f5764d787113fa323ffb18be7991208f82 (diff) | |
| parent | 091bf7624d1c90cec9e578a18529f615213ff847 (diff) | |
Merge commit 'v2.6.30-rc5' into core/iommu
Merge reason: core/iommu was on an .30-rc1 base,
update it to .30-rc5 to refresh.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-m32r/cachectl.h')
| -rw-r--r-- | include/asm-m32r/cachectl.h | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/include/asm-m32r/cachectl.h b/include/asm-m32r/cachectl.h deleted file mode 100644 index 2aab8f6fff41..000000000000 --- a/include/asm-m32r/cachectl.h +++ /dev/null | |||
| @@ -1,26 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * cachectl.h -- defines for M32R cache control system calls | ||
| 3 | * | ||
| 4 | * Copyright (C) 2003 by Kazuhiro Inaoka | ||
| 5 | */ | ||
| 6 | #ifndef __ASM_M32R_CACHECTL | ||
| 7 | #define __ASM_M32R_CACHECTL | ||
| 8 | |||
| 9 | /* | ||
| 10 | * Options for cacheflush system call | ||
| 11 | * | ||
| 12 | * cacheflush() is currently fluch_cache_all(). | ||
| 13 | */ | ||
| 14 | #define ICACHE (1<<0) /* flush instruction cache */ | ||
| 15 | #define DCACHE (1<<1) /* writeback and flush data cache */ | ||
| 16 | #define BCACHE (ICACHE|DCACHE) /* flush both caches */ | ||
| 17 | |||
| 18 | /* | ||
| 19 | * Caching modes for the cachectl(2) call | ||
| 20 | * | ||
| 21 | * cachectl(2) is currently not supported and returns ENOSYS. | ||
| 22 | */ | ||
| 23 | #define CACHEABLE 0 /* make pages cacheable */ | ||
| 24 | #define UNCACHEABLE 1 /* make pages uncacheable */ | ||
| 25 | |||
| 26 | #endif /* __ASM_M32R_CACHECTL */ | ||
