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authorYasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>2007-07-17 08:22:23 -0400
committerTony Luck <tony.luck@intel.com>2007-07-17 12:51:49 -0400
commite1b30a392835e92581db09a4e8b4b2ad53a0c370 (patch)
tree1a0dacd37e682dc4c2222f415f8035057d6bbc30 /include/asm-ia64
parentf8c087f31e1d3fbf1f7d0b3ea5e643f535e7de04 (diff)
[IA64] Add mapping table between irq and vector
Add mapping tables between irqs and vectors, and its management code. This is necessary for supporting multiple vector domain because 1:1 mapping between irq and vector will be changed to n:1. The irq == vector relationship between irqs and vectors is explicitly remained for percpu interrupts, platform interrupts, isa IRQs and vectors assigned using assign_irq_vector() because some programs might depend on it. And I should consider the following problem. When pci drivers enabled/disabled devices dynamically, its irq number is changed to the different one. Therefore, suspend/resume code may happen problem. To fix this problem, I bound gsi to irq. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64')
-rw-r--r--include/asm-ia64/hw_irq.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index c054d7a9aaa7..4eff7ff2da82 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -90,13 +90,24 @@ enum {
90extern __u8 isa_irq_to_vector_map[16]; 90extern __u8 isa_irq_to_vector_map[16];
91#define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)] 91#define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)]
92 92
93struct irq_cfg {
94 ia64_vector vector;
95};
96extern spinlock_t vector_lock;
97extern struct irq_cfg irq_cfg[NR_IRQS];
98DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);
99
93extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */ 100extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
94 101
102extern int bind_irq_vector(int irq, int vector);
95extern int assign_irq_vector (int irq); /* allocate a free vector */ 103extern int assign_irq_vector (int irq); /* allocate a free vector */
96extern void free_irq_vector (int vector); 104extern void free_irq_vector (int vector);
97extern int reserve_irq_vector (int vector); 105extern int reserve_irq_vector (int vector);
106extern void __setup_vector_irq(int cpu);
98extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect); 107extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
99extern void register_percpu_irq (ia64_vector vec, struct irqaction *action); 108extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
109extern int check_irq_used (int irq);
110extern void destroy_and_reserve_irq (unsigned int irq);
100 111
101static inline void ia64_resend_irq(unsigned int vector) 112static inline void ia64_resend_irq(unsigned int vector)
102{ 113{
@@ -113,7 +124,7 @@ extern irq_desc_t irq_desc[NR_IRQS];
113static inline unsigned int 124static inline unsigned int
114__ia64_local_vector_to_irq (ia64_vector vec) 125__ia64_local_vector_to_irq (ia64_vector vec)
115{ 126{
116 return (unsigned int) vec; 127 return __get_cpu_var(vector_irq)[vec];
117} 128}
118#endif 129#endif
119 130
@@ -131,7 +142,7 @@ __ia64_local_vector_to_irq (ia64_vector vec)
131static inline ia64_vector 142static inline ia64_vector
132irq_to_vector (int irq) 143irq_to_vector (int irq)
133{ 144{
134 return (ia64_vector) irq; 145 return irq_cfg[irq].vector;
135} 146}
136 147
137/* 148/*