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authorArthur Kepner <akepner@sgi.com>2008-04-29 04:00:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-29 11:06:12 -0400
commit309df0c503c35fbb5a09537fcbb1f4967b9ca489 (patch)
tree56a9df627a229bd64b934608b5f84d20bdaabf3a /include/asm-ia64
parenta75b0a2f68d3937f96ed39525e4750601483e3b4 (diff)
dma/ia64: update ia64 machvecs, swiotlb.c
Change all ia64 machvecs to use the new dma_*map*_attrs() interfaces. Implement the old dma_*map_*() interfaces in terms of the corresponding new interfaces. For ia64/sn, make use of one dma attribute, DMA_ATTR_WRITE_BARRIER. Introduce swiotlb_*map*_attrs() functions. Signed-off-by: Arthur Kepner <akepner@sgi.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Jes Sorensen <jes@sgi.com> Cc: Randy Dunlap <randy.dunlap@oracle.com> Cc: Roland Dreier <rdreier@cisco.com> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Cc: David Miller <davem@davemloft.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Grundler <grundler@parisc-linux.org> Cc: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-ia64')
-rw-r--r--include/asm-ia64/dma-mapping.h28
-rw-r--r--include/asm-ia64/machvec.h50
-rw-r--r--include/asm-ia64/machvec_hpzx1.h16
-rw-r--r--include/asm-ia64/machvec_hpzx1_swiotlb.h16
-rw-r--r--include/asm-ia64/machvec_sn2.h16
5 files changed, 78 insertions, 48 deletions
diff --git a/include/asm-ia64/dma-mapping.h b/include/asm-ia64/dma-mapping.h
index f1735a22d0ea..9f0df9bd46b7 100644
--- a/include/asm-ia64/dma-mapping.h
+++ b/include/asm-ia64/dma-mapping.h
@@ -23,10 +23,30 @@ dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
23{ 23{
24 dma_free_coherent(dev, size, cpu_addr, dma_handle); 24 dma_free_coherent(dev, size, cpu_addr, dma_handle);
25} 25}
26#define dma_map_single platform_dma_map_single 26#define dma_map_single_attrs platform_dma_map_single_attrs
27#define dma_map_sg platform_dma_map_sg 27static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
28#define dma_unmap_single platform_dma_unmap_single 28 size_t size, int dir)
29#define dma_unmap_sg platform_dma_unmap_sg 29{
30 return dma_map_single_attrs(dev, cpu_addr, size, dir, NULL);
31}
32#define dma_map_sg_attrs platform_dma_map_sg_attrs
33static inline int dma_map_sg(struct device *dev, struct scatterlist *sgl,
34 int nents, int dir)
35{
36 return dma_map_sg_attrs(dev, sgl, nents, dir, NULL);
37}
38#define dma_unmap_single_attrs platform_dma_unmap_single_attrs
39static inline void dma_unmap_single(struct device *dev, dma_addr_t cpu_addr,
40 size_t size, int dir)
41{
42 return dma_unmap_single_attrs(dev, cpu_addr, size, dir, NULL);
43}
44#define dma_unmap_sg_attrs platform_dma_unmap_sg_attrs
45static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
46 int nents, int dir)
47{
48 return dma_unmap_sg_attrs(dev, sgl, nents, dir, NULL);
49}
30#define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu 50#define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu
31#define dma_sync_sg_for_cpu platform_dma_sync_sg_for_cpu 51#define dma_sync_sg_for_cpu platform_dma_sync_sg_for_cpu
32#define dma_sync_single_for_device platform_dma_sync_single_for_device 52#define dma_sync_single_for_device platform_dma_sync_single_for_device
diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h
index c201a2020aa4..9f020eb825c5 100644
--- a/include/asm-ia64/machvec.h
+++ b/include/asm-ia64/machvec.h
@@ -22,6 +22,7 @@ struct pci_bus;
22struct task_struct; 22struct task_struct;
23struct pci_dev; 23struct pci_dev;
24struct msi_desc; 24struct msi_desc;
25struct dma_attrs;
25 26
26typedef void ia64_mv_setup_t (char **); 27typedef void ia64_mv_setup_t (char **);
27typedef void ia64_mv_cpu_init_t (void); 28typedef void ia64_mv_cpu_init_t (void);
@@ -56,6 +57,11 @@ typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist
56typedef int ia64_mv_dma_mapping_error (dma_addr_t dma_addr); 57typedef int ia64_mv_dma_mapping_error (dma_addr_t dma_addr);
57typedef int ia64_mv_dma_supported (struct device *, u64); 58typedef int ia64_mv_dma_supported (struct device *, u64);
58 59
60typedef dma_addr_t ia64_mv_dma_map_single_attrs (struct device *, void *, size_t, int, struct dma_attrs *);
61typedef void ia64_mv_dma_unmap_single_attrs (struct device *, dma_addr_t, size_t, int, struct dma_attrs *);
62typedef int ia64_mv_dma_map_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
63typedef void ia64_mv_dma_unmap_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
64
59/* 65/*
60 * WARNING: The legacy I/O space is _architected_. Platforms are 66 * WARNING: The legacy I/O space is _architected_. Platforms are
61 * expected to follow this architected model (see Section 10.7 in the 67 * expected to follow this architected model (see Section 10.7 in the
@@ -136,10 +142,10 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
136# define platform_dma_init ia64_mv.dma_init 142# define platform_dma_init ia64_mv.dma_init
137# define platform_dma_alloc_coherent ia64_mv.dma_alloc_coherent 143# define platform_dma_alloc_coherent ia64_mv.dma_alloc_coherent
138# define platform_dma_free_coherent ia64_mv.dma_free_coherent 144# define platform_dma_free_coherent ia64_mv.dma_free_coherent
139# define platform_dma_map_single ia64_mv.dma_map_single 145# define platform_dma_map_single_attrs ia64_mv.dma_map_single_attrs
140# define platform_dma_unmap_single ia64_mv.dma_unmap_single 146# define platform_dma_unmap_single_attrs ia64_mv.dma_unmap_single_attrs
141# define platform_dma_map_sg ia64_mv.dma_map_sg 147# define platform_dma_map_sg_attrs ia64_mv.dma_map_sg_attrs
142# define platform_dma_unmap_sg ia64_mv.dma_unmap_sg 148# define platform_dma_unmap_sg_attrs ia64_mv.dma_unmap_sg_attrs
143# define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu 149# define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu
144# define platform_dma_sync_sg_for_cpu ia64_mv.dma_sync_sg_for_cpu 150# define platform_dma_sync_sg_for_cpu ia64_mv.dma_sync_sg_for_cpu
145# define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device 151# define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device
@@ -190,10 +196,10 @@ struct ia64_machine_vector {
190 ia64_mv_dma_init *dma_init; 196 ia64_mv_dma_init *dma_init;
191 ia64_mv_dma_alloc_coherent *dma_alloc_coherent; 197 ia64_mv_dma_alloc_coherent *dma_alloc_coherent;
192 ia64_mv_dma_free_coherent *dma_free_coherent; 198 ia64_mv_dma_free_coherent *dma_free_coherent;
193 ia64_mv_dma_map_single *dma_map_single; 199 ia64_mv_dma_map_single_attrs *dma_map_single_attrs;
194 ia64_mv_dma_unmap_single *dma_unmap_single; 200 ia64_mv_dma_unmap_single_attrs *dma_unmap_single_attrs;
195 ia64_mv_dma_map_sg *dma_map_sg; 201 ia64_mv_dma_map_sg_attrs *dma_map_sg_attrs;
196 ia64_mv_dma_unmap_sg *dma_unmap_sg; 202 ia64_mv_dma_unmap_sg_attrs *dma_unmap_sg_attrs;
197 ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu; 203 ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu;
198 ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu; 204 ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu;
199 ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device; 205 ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device;
@@ -240,10 +246,10 @@ struct ia64_machine_vector {
240 platform_dma_init, \ 246 platform_dma_init, \
241 platform_dma_alloc_coherent, \ 247 platform_dma_alloc_coherent, \
242 platform_dma_free_coherent, \ 248 platform_dma_free_coherent, \
243 platform_dma_map_single, \ 249 platform_dma_map_single_attrs, \
244 platform_dma_unmap_single, \ 250 platform_dma_unmap_single_attrs, \
245 platform_dma_map_sg, \ 251 platform_dma_map_sg_attrs, \
246 platform_dma_unmap_sg, \ 252 platform_dma_unmap_sg_attrs, \
247 platform_dma_sync_single_for_cpu, \ 253 platform_dma_sync_single_for_cpu, \
248 platform_dma_sync_sg_for_cpu, \ 254 platform_dma_sync_sg_for_cpu, \
249 platform_dma_sync_single_for_device, \ 255 platform_dma_sync_single_for_device, \
@@ -292,9 +298,13 @@ extern ia64_mv_dma_init swiotlb_init;
292extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent; 298extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent;
293extern ia64_mv_dma_free_coherent swiotlb_free_coherent; 299extern ia64_mv_dma_free_coherent swiotlb_free_coherent;
294extern ia64_mv_dma_map_single swiotlb_map_single; 300extern ia64_mv_dma_map_single swiotlb_map_single;
301extern ia64_mv_dma_map_single_attrs swiotlb_map_single_attrs;
295extern ia64_mv_dma_unmap_single swiotlb_unmap_single; 302extern ia64_mv_dma_unmap_single swiotlb_unmap_single;
303extern ia64_mv_dma_unmap_single_attrs swiotlb_unmap_single_attrs;
296extern ia64_mv_dma_map_sg swiotlb_map_sg; 304extern ia64_mv_dma_map_sg swiotlb_map_sg;
305extern ia64_mv_dma_map_sg_attrs swiotlb_map_sg_attrs;
297extern ia64_mv_dma_unmap_sg swiotlb_unmap_sg; 306extern ia64_mv_dma_unmap_sg swiotlb_unmap_sg;
307extern ia64_mv_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs;
298extern ia64_mv_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu; 308extern ia64_mv_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu;
299extern ia64_mv_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu; 309extern ia64_mv_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu;
300extern ia64_mv_dma_sync_single_for_device swiotlb_sync_single_for_device; 310extern ia64_mv_dma_sync_single_for_device swiotlb_sync_single_for_device;
@@ -340,17 +350,17 @@ extern ia64_mv_dma_supported swiotlb_dma_supported;
340#ifndef platform_dma_free_coherent 350#ifndef platform_dma_free_coherent
341# define platform_dma_free_coherent swiotlb_free_coherent 351# define platform_dma_free_coherent swiotlb_free_coherent
342#endif 352#endif
343#ifndef platform_dma_map_single 353#ifndef platform_dma_map_single_attrs
344# define platform_dma_map_single swiotlb_map_single 354# define platform_dma_map_single_attrs swiotlb_map_single_attrs
345#endif 355#endif
346#ifndef platform_dma_unmap_single 356#ifndef platform_dma_unmap_single_attrs
347# define platform_dma_unmap_single swiotlb_unmap_single 357# define platform_dma_unmap_single_attrs swiotlb_unmap_single_attrs
348#endif 358#endif
349#ifndef platform_dma_map_sg 359#ifndef platform_dma_map_sg_attrs
350# define platform_dma_map_sg swiotlb_map_sg 360# define platform_dma_map_sg_attrs swiotlb_map_sg_attrs
351#endif 361#endif
352#ifndef platform_dma_unmap_sg 362#ifndef platform_dma_unmap_sg_attrs
353# define platform_dma_unmap_sg swiotlb_unmap_sg 363# define platform_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs
354#endif 364#endif
355#ifndef platform_dma_sync_single_for_cpu 365#ifndef platform_dma_sync_single_for_cpu
356# define platform_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu 366# define platform_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu
diff --git a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h
index e90daf9ce340..2f57f5144b9f 100644
--- a/include/asm-ia64/machvec_hpzx1.h
+++ b/include/asm-ia64/machvec_hpzx1.h
@@ -4,10 +4,10 @@
4extern ia64_mv_setup_t dig_setup; 4extern ia64_mv_setup_t dig_setup;
5extern ia64_mv_dma_alloc_coherent sba_alloc_coherent; 5extern ia64_mv_dma_alloc_coherent sba_alloc_coherent;
6extern ia64_mv_dma_free_coherent sba_free_coherent; 6extern ia64_mv_dma_free_coherent sba_free_coherent;
7extern ia64_mv_dma_map_single sba_map_single; 7extern ia64_mv_dma_map_single_attrs sba_map_single_attrs;
8extern ia64_mv_dma_unmap_single sba_unmap_single; 8extern ia64_mv_dma_unmap_single_attrs sba_unmap_single_attrs;
9extern ia64_mv_dma_map_sg sba_map_sg; 9extern ia64_mv_dma_map_sg_attrs sba_map_sg_attrs;
10extern ia64_mv_dma_unmap_sg sba_unmap_sg; 10extern ia64_mv_dma_unmap_sg_attrs sba_unmap_sg_attrs;
11extern ia64_mv_dma_supported sba_dma_supported; 11extern ia64_mv_dma_supported sba_dma_supported;
12extern ia64_mv_dma_mapping_error sba_dma_mapping_error; 12extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
13 13
@@ -23,10 +23,10 @@ extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
23#define platform_dma_init machvec_noop 23#define platform_dma_init machvec_noop
24#define platform_dma_alloc_coherent sba_alloc_coherent 24#define platform_dma_alloc_coherent sba_alloc_coherent
25#define platform_dma_free_coherent sba_free_coherent 25#define platform_dma_free_coherent sba_free_coherent
26#define platform_dma_map_single sba_map_single 26#define platform_dma_map_single_attrs sba_map_single_attrs
27#define platform_dma_unmap_single sba_unmap_single 27#define platform_dma_unmap_single_attrs sba_unmap_single_attrs
28#define platform_dma_map_sg sba_map_sg 28#define platform_dma_map_sg_attrs sba_map_sg_attrs
29#define platform_dma_unmap_sg sba_unmap_sg 29#define platform_dma_unmap_sg_attrs sba_unmap_sg_attrs
30#define platform_dma_sync_single_for_cpu machvec_dma_sync_single 30#define platform_dma_sync_single_for_cpu machvec_dma_sync_single
31#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg 31#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg
32#define platform_dma_sync_single_for_device machvec_dma_sync_single 32#define platform_dma_sync_single_for_device machvec_dma_sync_single
diff --git a/include/asm-ia64/machvec_hpzx1_swiotlb.h b/include/asm-ia64/machvec_hpzx1_swiotlb.h
index f00a34a148ff..a842cdda827b 100644
--- a/include/asm-ia64/machvec_hpzx1_swiotlb.h
+++ b/include/asm-ia64/machvec_hpzx1_swiotlb.h
@@ -4,10 +4,10 @@
4extern ia64_mv_setup_t dig_setup; 4extern ia64_mv_setup_t dig_setup;
5extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent; 5extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent;
6extern ia64_mv_dma_free_coherent hwsw_free_coherent; 6extern ia64_mv_dma_free_coherent hwsw_free_coherent;
7extern ia64_mv_dma_map_single hwsw_map_single; 7extern ia64_mv_dma_map_single_attrs hwsw_map_single_attrs;
8extern ia64_mv_dma_unmap_single hwsw_unmap_single; 8extern ia64_mv_dma_unmap_single_attrs hwsw_unmap_single_attrs;
9extern ia64_mv_dma_map_sg hwsw_map_sg; 9extern ia64_mv_dma_map_sg_attrs hwsw_map_sg_attrs;
10extern ia64_mv_dma_unmap_sg hwsw_unmap_sg; 10extern ia64_mv_dma_unmap_sg_attrs hwsw_unmap_sg_attrs;
11extern ia64_mv_dma_supported hwsw_dma_supported; 11extern ia64_mv_dma_supported hwsw_dma_supported;
12extern ia64_mv_dma_mapping_error hwsw_dma_mapping_error; 12extern ia64_mv_dma_mapping_error hwsw_dma_mapping_error;
13extern ia64_mv_dma_sync_single_for_cpu hwsw_sync_single_for_cpu; 13extern ia64_mv_dma_sync_single_for_cpu hwsw_sync_single_for_cpu;
@@ -28,10 +28,10 @@ extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device;
28#define platform_dma_init machvec_noop 28#define platform_dma_init machvec_noop
29#define platform_dma_alloc_coherent hwsw_alloc_coherent 29#define platform_dma_alloc_coherent hwsw_alloc_coherent
30#define platform_dma_free_coherent hwsw_free_coherent 30#define platform_dma_free_coherent hwsw_free_coherent
31#define platform_dma_map_single hwsw_map_single 31#define platform_dma_map_single_attrs hwsw_map_single_attrs
32#define platform_dma_unmap_single hwsw_unmap_single 32#define platform_dma_unmap_single_attrs hwsw_unmap_single_attrs
33#define platform_dma_map_sg hwsw_map_sg 33#define platform_dma_map_sg_attrs hwsw_map_sg_attrs
34#define platform_dma_unmap_sg hwsw_unmap_sg 34#define platform_dma_unmap_sg_attrs hwsw_unmap_sg_attrs
35#define platform_dma_supported hwsw_dma_supported 35#define platform_dma_supported hwsw_dma_supported
36#define platform_dma_mapping_error hwsw_dma_mapping_error 36#define platform_dma_mapping_error hwsw_dma_mapping_error
37#define platform_dma_sync_single_for_cpu hwsw_sync_single_for_cpu 37#define platform_dma_sync_single_for_cpu hwsw_sync_single_for_cpu
diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h
index 61439a7f5b08..781308ea7b88 100644
--- a/include/asm-ia64/machvec_sn2.h
+++ b/include/asm-ia64/machvec_sn2.h
@@ -57,10 +57,10 @@ extern ia64_mv_readl_t __sn_readl_relaxed;
57extern ia64_mv_readq_t __sn_readq_relaxed; 57extern ia64_mv_readq_t __sn_readq_relaxed;
58extern ia64_mv_dma_alloc_coherent sn_dma_alloc_coherent; 58extern ia64_mv_dma_alloc_coherent sn_dma_alloc_coherent;
59extern ia64_mv_dma_free_coherent sn_dma_free_coherent; 59extern ia64_mv_dma_free_coherent sn_dma_free_coherent;
60extern ia64_mv_dma_map_single sn_dma_map_single; 60extern ia64_mv_dma_map_single_attrs sn_dma_map_single_attrs;
61extern ia64_mv_dma_unmap_single sn_dma_unmap_single; 61extern ia64_mv_dma_unmap_single_attrs sn_dma_unmap_single_attrs;
62extern ia64_mv_dma_map_sg sn_dma_map_sg; 62extern ia64_mv_dma_map_sg_attrs sn_dma_map_sg_attrs;
63extern ia64_mv_dma_unmap_sg sn_dma_unmap_sg; 63extern ia64_mv_dma_unmap_sg_attrs sn_dma_unmap_sg_attrs;
64extern ia64_mv_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu; 64extern ia64_mv_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu;
65extern ia64_mv_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu; 65extern ia64_mv_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu;
66extern ia64_mv_dma_sync_single_for_device sn_dma_sync_single_for_device; 66extern ia64_mv_dma_sync_single_for_device sn_dma_sync_single_for_device;
@@ -113,10 +113,10 @@ extern ia64_mv_pci_fixup_bus_t sn_pci_fixup_bus;
113#define platform_dma_init machvec_noop 113#define platform_dma_init machvec_noop
114#define platform_dma_alloc_coherent sn_dma_alloc_coherent 114#define platform_dma_alloc_coherent sn_dma_alloc_coherent
115#define platform_dma_free_coherent sn_dma_free_coherent 115#define platform_dma_free_coherent sn_dma_free_coherent
116#define platform_dma_map_single sn_dma_map_single 116#define platform_dma_map_single_attrs sn_dma_map_single_attrs
117#define platform_dma_unmap_single sn_dma_unmap_single 117#define platform_dma_unmap_single_attrs sn_dma_unmap_single_attrs
118#define platform_dma_map_sg sn_dma_map_sg 118#define platform_dma_map_sg_attrs sn_dma_map_sg_attrs
119#define platform_dma_unmap_sg sn_dma_unmap_sg 119#define platform_dma_unmap_sg_attrs sn_dma_unmap_sg_attrs
120#define platform_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu 120#define platform_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu
121#define platform_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu 121#define platform_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu
122#define platform_dma_sync_single_for_device sn_dma_sync_single_for_device 122#define platform_dma_sync_single_for_device sn_dma_sync_single_for_device