diff options
author | Bruce Losure <blosure@americas.sgi.com> | 2005-09-02 16:16:35 -0400 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2005-09-06 17:16:01 -0400 |
commit | 25732ad493b22b7d9f0d250c5a9ad17219f96a47 (patch) | |
tree | 6d2c753c248977fdca4b5d423b65d7fbf2f70186 /include/asm-ia64/sn/sn_sal.h | |
parent | 4706df3d3c42af802597d82c8b1542c3d52eab23 (diff) |
[IA64] Altix patch for fpga reset
1) workaround a h/w reset issue
2) to improve the determination of FPGA-based h/w in
the arch/ia64/sn/kernel/tiocx code.
Signed-off-by: Bruce Losure <blosure@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/sn/sn_sal.h')
-rw-r--r-- | include/asm-ia64/sn/sn_sal.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index e67825ad1930..6f96ae8b4fbe 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h | |||
@@ -47,6 +47,7 @@ | |||
47 | #define SN_SAL_CONSOLE_PUTB 0x02000028 | 47 | #define SN_SAL_CONSOLE_PUTB 0x02000028 |
48 | #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a | 48 | #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a |
49 | #define SN_SAL_CONSOLE_READC 0x0200002b | 49 | #define SN_SAL_CONSOLE_READC 0x0200002b |
50 | #define SN_SAL_SYSCTL_OP 0x02000030 | ||
50 | #define SN_SAL_SYSCTL_MODID_GET 0x02000031 | 51 | #define SN_SAL_SYSCTL_MODID_GET 0x02000031 |
51 | #define SN_SAL_SYSCTL_GET 0x02000032 | 52 | #define SN_SAL_SYSCTL_GET 0x02000032 |
52 | #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 | 53 | #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 |
@@ -98,6 +99,13 @@ | |||
98 | #define SAL_INTR_FREE 2 | 99 | #define SAL_INTR_FREE 2 |
99 | 100 | ||
100 | /* | 101 | /* |
102 | * operations available on the generic SN_SAL_SYSCTL_OP | ||
103 | * runtime service | ||
104 | */ | ||
105 | #define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */ | ||
106 | #define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */ | ||
107 | |||
108 | /* | ||
101 | * IRouter (i.e. generalized system controller) operations | 109 | * IRouter (i.e. generalized system controller) operations |
102 | */ | 110 | */ |
103 | #define SAL_IROUTER_OPEN 0 /* open a subchannel */ | 111 | #define SAL_IROUTER_OPEN 0 /* open a subchannel */ |
@@ -876,6 +884,41 @@ ia64_sn_sysctl_event_init(nasid_t nasid) | |||
876 | return (int) rv.v0; | 884 | return (int) rv.v0; |
877 | } | 885 | } |
878 | 886 | ||
887 | /* | ||
888 | * Ask the system controller on the specified nasid to reset | ||
889 | * the CX corelet clock. Only valid on TIO nodes. | ||
890 | */ | ||
891 | static inline int | ||
892 | ia64_sn_sysctl_tio_clock_reset(nasid_t nasid) | ||
893 | { | ||
894 | struct ia64_sal_retval rv; | ||
895 | SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST, | ||
896 | nasid, 0, 0, 0, 0, 0); | ||
897 | if (rv.status != 0) | ||
898 | return (int)rv.status; | ||
899 | if (rv.v0 != 0) | ||
900 | return (int)rv.v0; | ||
901 | |||
902 | return 0; | ||
903 | } | ||
904 | |||
905 | /* | ||
906 | * Get the associated ioboard type for a given nasid. | ||
907 | */ | ||
908 | static inline int | ||
909 | ia64_sn_sysctl_ioboard_get(nasid_t nasid) | ||
910 | { | ||
911 | struct ia64_sal_retval rv; | ||
912 | SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD, | ||
913 | nasid, 0, 0, 0, 0, 0); | ||
914 | if (rv.v0 != 0) | ||
915 | return (int)rv.v0; | ||
916 | if (rv.v1 != 0) | ||
917 | return (int)rv.v1; | ||
918 | |||
919 | return 0; | ||
920 | } | ||
921 | |||
879 | /** | 922 | /** |
880 | * ia64_sn_get_fit_compt - read a FIT entry from the PROM header | 923 | * ia64_sn_get_fit_compt - read a FIT entry from the PROM header |
881 | * @nasid: NASID of node to read | 924 | * @nasid: NASID of node to read |