[IA64] Cleanup of arch/ia64/sn and include/asm-ia64/sn

Replace uintX_t declarations with uX declarations.
Replace intX_t declarations with sX declarations.

Signed-off-by: Prarit Bhargava <prarit@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

1 files changed, 24 insertions, 24 deletions

diff --git a/include/asm-ia64/sn/pcibr_provider.h b/include/asm-ia64/sn/pcibr_provider.h
index 2b42d9ece26b..9334078b089a 100644
--- a/include/asm-ia64/sn/pcibr_provider.h
+++ b/include/asm-ia64/sn/pcibr_provider.h
@@ -44,9 +44,9 @@
 #define PCI32_MAPPED_BASE               0x40000000
 #define PCI32_DIRECT_BASE               0x80000000
 
-#define IS_PCI32_MAPPED(x)              ((uint64_t)(x) < PCI32_DIRECT_BASE && \
-                                         (uint64_t)(x) >= PCI32_MAPPED_BASE)
-#define IS_PCI32_DIRECT(x)              ((uint64_t)(x) >= PCI32_MAPPED_BASE)
+#define IS_PCI32_MAPPED(x)              ((u64)(x) < PCI32_DIRECT_BASE && \
+                                         (u64)(x) >= PCI32_MAPPED_BASE)
+#define IS_PCI32_DIRECT(x)              ((u64)(x) >= PCI32_MAPPED_BASE)
 
 
 /*
@@ -63,7 +63,7 @@
         (IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1))
 
 #define MINIMAL_ATE_FLAG(addr, size) \
-        (MINIMAL_ATES_REQUIRED((uint64_t)addr, size) ? 1 : 0)
+        (MINIMAL_ATES_REQUIRED((u64)addr, size) ? 1 : 0)
 
 /* bit 29 of the pci address is the SWAP bit */
 #define ATE_SWAPSHIFT                   29
@@ -90,27 +90,27 @@
  * PMU resources.
  */
 struct ate_resource{
-        uint64_t *ate;
-        uint64_t num_ate;
-        uint64_t lowest_free_index;
+        u64 *ate;
+        u64 num_ate;
+        u64 lowest_free_index;
 };
 
 struct pcibus_info {
         struct pcibus_bussoft   pbi_buscommon;   /* common header */
-        uint32_t                pbi_moduleid;
+        u32                pbi_moduleid;
         short                   pbi_bridge_type;
         short                   pbi_bridge_mode;
 
         struct ate_resource     pbi_int_ate_resource;
-        uint64_t                pbi_int_ate_size;
+        u64                pbi_int_ate_size;
 
-        uint64_t                pbi_dir_xbase;
+        u64                pbi_dir_xbase;
         char                    pbi_hub_xid;
 
-        uint64_t                pbi_devreg[8];
+        u64                pbi_devreg[8];
 
-        uint32_t                pbi_valid_devices;
-        uint32_t                pbi_enabled_devices;
+        u32             pbi_valid_devices;
+        u32             pbi_enabled_devices;
 
         spinlock_t              pbi_lock;
 };
@@ -136,22 +136,22 @@ extern void pcibr_dma_unmap(struct pci_dev *, dma_addr_t, int);
 /*
  * prototypes for the bridge asic register access routines in pcibr_reg.c
  */
-extern void             pcireg_control_bit_clr(struct pcibus_info *, uint64_t);
-extern void             pcireg_control_bit_set(struct pcibus_info *, uint64_t);
-extern uint64_t         pcireg_tflush_get(struct pcibus_info *);
-extern uint64_t         pcireg_intr_status_get(struct pcibus_info *);
-extern void             pcireg_intr_enable_bit_clr(struct pcibus_info *, uint64_t);
-extern void             pcireg_intr_enable_bit_set(struct pcibus_info *, uint64_t);
-extern void             pcireg_intr_addr_addr_set(struct pcibus_info *, int, uint64_t);
+extern void             pcireg_control_bit_clr(struct pcibus_info *, u64);
+extern void             pcireg_control_bit_set(struct pcibus_info *, u64);
+extern u64         pcireg_tflush_get(struct pcibus_info *);
+extern u64         pcireg_intr_status_get(struct pcibus_info *);
+extern void             pcireg_intr_enable_bit_clr(struct pcibus_info *, u64);
+extern void             pcireg_intr_enable_bit_set(struct pcibus_info *, u64);
+extern void             pcireg_intr_addr_addr_set(struct pcibus_info *, int, u64);
 extern void             pcireg_force_intr_set(struct pcibus_info *, int);
-extern uint64_t         pcireg_wrb_flush_get(struct pcibus_info *, int);
-extern void             pcireg_int_ate_set(struct pcibus_info *, int, uint64_t);
-extern uint64_t *       pcireg_int_ate_addr(struct pcibus_info *, int);
+extern u64         pcireg_wrb_flush_get(struct pcibus_info *, int);
+extern void             pcireg_int_ate_set(struct pcibus_info *, int, u64);
+extern u64 *    pcireg_int_ate_addr(struct pcibus_info *, int);
 extern void             pcibr_force_interrupt(struct sn_irq_info *sn_irq_info);
 extern void             pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info);
 extern int              pcibr_ate_alloc(struct pcibus_info *, int);
 extern void             pcibr_ate_free(struct pcibus_info *, int);
-extern void             ate_write(struct pcibus_info *, int, int, uint64_t);
+extern void             ate_write(struct pcibus_info *, int, int, u64);
 extern int sal_pcibr_slot_enable(struct pcibus_info *soft, int device,
                                  void *resp);
 extern int sal_pcibr_slot_disable(struct pcibus_info *soft, int device,