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authorRuss Anderson <rja@sgi.com>2007-08-21 17:45:12 -0400
committerTony Luck <tony.luck@intel.com>2007-12-19 14:19:19 -0500
commit64135fa97ce016058f95345425a9ebd04ee1bd2a (patch)
tree7b7cd85c07a608db9e01b39694d9af7a823bdfdb /include/asm-ia64/sn/bte.h
parent091062284c05d13b3393f4fcfcedc0f52cb948b4 (diff)
[IA64] Fix Altix BTE error return status
The Altix shub2 BTE error detail bits are in a different location than on shub1. The current code does not take this into account resulting in all shub2 BTE failures mapping to "unknown". This patch reads the error detail bits from the proper location, so the correct BTE failure reason is returned for both shub1 and shub2. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/sn/bte.h')
-rw-r--r--include/asm-ia64/sn/bte.h31
1 files changed, 30 insertions, 1 deletions
diff --git a/include/asm-ia64/sn/bte.h b/include/asm-ia64/sn/bte.h
index 5335d87ca5f8..a0d214f43115 100644
--- a/include/asm-ia64/sn/bte.h
+++ b/include/asm-ia64/sn/bte.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. 6 * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
7 */ 7 */
8 8
9 9
@@ -150,6 +150,35 @@ typedef enum {
150 BTEFAIL_NOTAVAIL, /* BTE not available */ 150 BTEFAIL_NOTAVAIL, /* BTE not available */
151} bte_result_t; 151} bte_result_t;
152 152
153#define BTEFAIL_SH2_RESP_SHORT 0x1 /* bit 000001 */
154#define BTEFAIL_SH2_RESP_LONG 0x2 /* bit 000010 */
155#define BTEFAIL_SH2_RESP_DSP 0x4 /* bit 000100 */
156#define BTEFAIL_SH2_RESP_ACCESS 0x8 /* bit 001000 */
157#define BTEFAIL_SH2_CRB_TO 0x10 /* bit 010000 */
158#define BTEFAIL_SH2_NACK_LIMIT 0x20 /* bit 100000 */
159#define BTEFAIL_SH2_ALL 0x3F /* bit 111111 */
160
161#define BTE_ERR_BITS 0x3FUL
162#define BTE_ERR_SHIFT 36
163#define BTE_ERR_MASK (BTE_ERR_BITS << BTE_ERR_SHIFT)
164
165#define BTE_ERROR_RETRY(value) \
166 (is_shub2() ? (value != BTEFAIL_SH2_CRB_TO) \
167 : (value != BTEFAIL_TOUT))
168
169/*
170 * On shub1 BTE_ERR_MASK will always be false, so no need for is_shub2()
171 */
172#define BTE_SHUB2_ERROR(_status) \
173 ((_status & BTE_ERR_MASK) \
174 ? (((_status >> BTE_ERR_SHIFT) & BTE_ERR_BITS) | IBLS_ERROR) \
175 : _status)
176
177#define BTE_GET_ERROR_STATUS(_status) \
178 (BTE_SHUB2_ERROR(_status) & ~IBLS_ERROR)
179
180#define BTE_VALID_SH2_ERROR(value) \
181 ((value >= BTEFAIL_SH2_RESP_SHORT) && (value <= BTEFAIL_SH2_ALL))
153 182
154/* 183/*
155 * Structure defining a bte. An instance of this 184 * Structure defining a bte. An instance of this