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authorBjorn Helgaas <bjorn.helgaas@hp.com>2006-01-30 18:32:31 -0500
committerTony Luck <tony.luck@intel.com>2006-02-02 16:25:54 -0500
commita58786917ce23c2a26c3e099c3cdba32a35eeceb (patch)
tree4740de51febbe16934d24d94cb80432a7547cb26 /include/asm-ia64/processor.h
parentaf14aca90e0cdfccd71f9947c45b6ea2cf321dcb (diff)
[IA64] avoid broken SAL_CACHE_FLUSH implementations
If SAL_CACHE_FLUSH drops interrupts, complain about it and fall back to using PAL_CACHE_FLUSH instead. This is to work around a defect in HP rx5670 firmware: when an interrupt occurs during SAL_CACHE_FLUSH, SAL drops the interrupt but leaves it marked "in-service", which leaves the interrupt (and others of equal or lower priority) masked. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/processor.h')
-rw-r--r--include/asm-ia64/processor.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 09b99029ac1a..23c8e1be1911 100644
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -559,6 +559,23 @@ ia64_eoi (void)
559 559
560#define cpu_relax() ia64_hint(ia64_hint_pause) 560#define cpu_relax() ia64_hint(ia64_hint_pause)
561 561
562static inline int
563ia64_get_irr(unsigned int vector)
564{
565 unsigned int reg = vector / 64;
566 unsigned int bit = vector % 64;
567 u64 irr;
568
569 switch (reg) {
570 case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break;
571 case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break;
572 case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break;
573 case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break;
574 }
575
576 return test_bit(bit, &irr);
577}
578
562static inline void 579static inline void
563ia64_set_lrr0 (unsigned long val) 580ia64_set_lrr0 (unsigned long val)
564{ 581{