diff options
author | Tony Luck <tony.luck@intel.com> | 2006-09-26 12:47:04 -0400 |
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committer | Tony Luck <tony.luck@intel.com> | 2006-09-26 12:47:04 -0400 |
commit | ae3e0218621db0590163b2d5c424ef1f340e3cc6 (patch) | |
tree | a7e84e4b4a1e32fb64a99d7d5c73420b717f01ae /include/asm-ia64/pal.h | |
parent | e478bec0ba0a83a48a0f6982934b6de079e7e6b3 (diff) | |
parent | 76d08bb3f09054edc45326ce5c698a3f6c45f5d0 (diff) |
Pull model-name into release branch
Diffstat (limited to 'include/asm-ia64/pal.h')
-rw-r--r-- | include/asm-ia64/pal.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 20a8d618c845..d1587e4f5759 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h | |||
@@ -78,6 +78,7 @@ | |||
78 | #define PAL_VM_TR_READ 261 /* read contents of translation register */ | 78 | #define PAL_VM_TR_READ 261 /* read contents of translation register */ |
79 | #define PAL_GET_PSTATE 262 /* get the current P-state */ | 79 | #define PAL_GET_PSTATE 262 /* get the current P-state */ |
80 | #define PAL_SET_PSTATE 263 /* set the P-state */ | 80 | #define PAL_SET_PSTATE 263 /* set the P-state */ |
81 | #define PAL_BRAND_INFO 274 /* Processor branding information */ | ||
81 | 82 | ||
82 | #ifndef __ASSEMBLY__ | 83 | #ifndef __ASSEMBLY__ |
83 | 84 | ||
@@ -1133,6 +1134,15 @@ ia64_pal_set_pstate (u64 pstate_index) | |||
1133 | return iprv.status; | 1134 | return iprv.status; |
1134 | } | 1135 | } |
1135 | 1136 | ||
1137 | /* Processor branding information*/ | ||
1138 | static inline s64 | ||
1139 | ia64_pal_get_brand_info (char *brand_info) | ||
1140 | { | ||
1141 | struct ia64_pal_retval iprv; | ||
1142 | PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0); | ||
1143 | return iprv.status; | ||
1144 | } | ||
1145 | |||
1136 | /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are | 1146 | /* Cause the processor to enter LIGHT HALT state, where prefetching and execution are |
1137 | * suspended, but cache and TLB coherency is maintained. | 1147 | * suspended, but cache and TLB coherency is maintained. |
1138 | */ | 1148 | */ |