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authorZachary Amsden <zach@vmware.com>2007-05-02 13:27:19 -0400
committerAndi Kleen <andi@basil.nowhere.org>2007-05-02 13:27:19 -0400
commit142dd975911fdd82b1b6f6617cd20ac90a8ccf00 (patch)
tree1e72e96bce64d9301d3305b4dd0b30675c8676b0 /include/asm-i386
parentc2c1accd4b2f9c82fb89d40611c7f581948db255 (diff)
[PATCH] i386: pte xchg optimization
In situations where page table updates need only be made locally, and there is no cross-processor A/D bit races involved, we need not use the heavyweight xchg instruction to atomically fetch and clear page table entries. Instead, we can just read and clear them directly. This introduces a neat optimization for non-SMP kernels; drop the atomic xchg operations from page table updates. Thanks to Michel Lespinasse for noting this potential optimization. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'include/asm-i386')
-rw-r--r--include/asm-i386/pgtable-2level.h14
-rw-r--r--include/asm-i386/pgtable-3level.h14
2 files changed, 28 insertions, 0 deletions
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h
index 85d9005c0cdf..3daab67cd366 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-i386/pgtable-2level.h
@@ -41,10 +41,24 @@ static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pt
41 *xp = __pte(0); 41 *xp = __pte(0);
42} 42}
43 43
44/* local pte updates need not use xchg for locking */
45static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
46{
47 pte_t res;
48
49 res = *ptep;
50 native_pte_clear(NULL, 0, ptep);
51 return res;
52}
53
54#ifdef CONFIG_SMP
44static inline pte_t native_ptep_get_and_clear(pte_t *xp) 55static inline pte_t native_ptep_get_and_clear(pte_t *xp)
45{ 56{
46 return __pte(xchg(&xp->pte_low, 0)); 57 return __pte(xchg(&xp->pte_low, 0));
47} 58}
59#else
60#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
61#endif
48 62
49#define pte_page(x) pfn_to_page(pte_pfn(x)) 63#define pte_page(x) pfn_to_page(pte_pfn(x))
50#define pte_none(x) (!(x).pte_low) 64#define pte_none(x) (!(x).pte_low)
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 664bfee5a2f2..45b024181507 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -139,6 +139,17 @@ static inline void pud_clear (pud_t * pud) { }
139#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \ 139#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
140 pmd_index(address)) 140 pmd_index(address))
141 141
142/* local pte updates need not use xchg for locking */
143static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
144{
145 pte_t res;
146
147 res = *ptep;
148 native_pte_clear(NULL, 0, ptep);
149 return res;
150}
151
152#ifdef CONFIG_SMP
142static inline pte_t native_ptep_get_and_clear(pte_t *ptep) 153static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
143{ 154{
144 pte_t res; 155 pte_t res;
@@ -150,6 +161,9 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
150 161
151 return res; 162 return res;
152} 163}
164#else
165#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
166#endif
153 167
154#define __HAVE_ARCH_PTE_SAME 168#define __HAVE_ARCH_PTE_SAME
155static inline int pte_same(pte_t a, pte_t b) 169static inline int pte_same(pte_t a, pte_t b)