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authorAshok Raj <ashok.raj@intel.com>2005-11-09 00:42:33 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2005-11-10 19:09:18 -0500
commitb4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1 (patch)
treecf9ba9ae7999573a507df301faf34170ab08e2c3 /include/asm-i386
parent48b19148733b4826eeedfd8be9f19b61c8d010b1 (diff)
[PATCH] PCI: Change MSI to use physical delivery mode always
MSI hardcoded delivery mode to use logical delivery mode. Recently x86_64 moved to use physical mode addressing to support physflat mode. With this mode enabled noticed that my eth with MSI werent working. msi_address_init() was hardcoded to use logical mode for i386 and x86_64. So when we switch to use physical mode, things stopped working. Since anyway we dont use lowest priority delivery with MSI, its always directed to just a single CPU. Its safe and simpler to use physical mode always, even when we use logical delivery mode for IPI's or other ioapic RTE's. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/asm-i386')
-rw-r--r--include/asm-i386/msi.h9
-rw-r--r--include/asm-i386/smp.h6
2 files changed, 7 insertions, 8 deletions
diff --git a/include/asm-i386/msi.h b/include/asm-i386/msi.h
index b85393094c83..f041d4495faf 100644
--- a/include/asm-i386/msi.h
+++ b/include/asm-i386/msi.h
@@ -10,13 +10,6 @@
10#include <mach_apic.h> 10#include <mach_apic.h>
11 11
12#define LAST_DEVICE_VECTOR 232 12#define LAST_DEVICE_VECTOR 232
13#define MSI_DEST_MODE MSI_LOGICAL_MODE 13#define MSI_TARGET_CPU_SHIFT 12
14#define MSI_TARGET_CPU_SHIFT 12
15
16#ifdef CONFIG_SMP
17#define MSI_TARGET_CPU logical_smp_processor_id()
18#else
19#define MSI_TARGET_CPU cpu_to_logical_apicid(first_cpu(cpu_online_map))
20#endif
21 14
22#endif /* ASM_MSI_H */ 15#endif /* ASM_MSI_H */
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index 13250199976d..61d3ab9db70c 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -45,6 +45,8 @@ extern void unlock_ipi_call_lock(void);
45#define MAX_APICID 256 45#define MAX_APICID 256
46extern u8 x86_cpu_to_apicid[]; 46extern u8 x86_cpu_to_apicid[];
47 47
48#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
49
48#ifdef CONFIG_HOTPLUG_CPU 50#ifdef CONFIG_HOTPLUG_CPU
49extern void cpu_exit_clear(void); 51extern void cpu_exit_clear(void);
50extern void cpu_uninit(void); 52extern void cpu_uninit(void);
@@ -92,6 +94,10 @@ extern int __cpu_disable(void);
92extern void __cpu_die(unsigned int cpu); 94extern void __cpu_die(unsigned int cpu);
93#endif /* !__ASSEMBLY__ */ 95#endif /* !__ASSEMBLY__ */
94 96
97#else /* CONFIG_SMP */
98
99#define cpu_physical_id(cpu) boot_cpu_physical_apicid
100
95#define NO_PROC_ID 0xFF /* No processor magic marker */ 101#define NO_PROC_ID 0xFF /* No processor magic marker */
96 102
97#endif 103#endif