diff options
author | Alexey Dobriyan <adobriyan@openvz.org> | 2007-02-16 04:48:11 -0500 |
---|---|---|
committer | Dave Jones <davej@redhat.com> | 2007-02-20 14:23:43 -0500 |
commit | b077ffb3b767c3efb44d00b998385a9cb127255c (patch) | |
tree | 160369b5541142afedc20a97a9c89718550cf2a3 /include/asm-i386 | |
parent | 22f7bb0329a506f2fd61c14ce3c8bc632e08c732 (diff) |
rdmsr_on_cpu, wrmsr_on_cpu
There was OpenVZ specific bug rendering some cpufreq drivers unusable on SMP.
In short, when cpufreq code thinks it confined itself to needed cpu by means
of set_cpus_allowed() to execute rdmsr, some "virtual cpu" feature can migrate
process to anywhere. This triggers bugons and does wrong things in general.
This got fixed by introducing rdmsr_on_cpu and wrmsr_on_cpu executing rdmsr
and wrmsr on given physical cpu by means of smp_call_function_single().
Dave Jones mentioned cpufreq might be not only user of rdmsr_on_cpu() and
wrmsr_on_cpu(), so I'm putting them into arch/{i386,x86_64}/lib/ .
Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'include/asm-i386')
-rw-r--r-- | include/asm-i386/msr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h index 609a3899475c..3516a1fb38e0 100644 --- a/include/asm-i386/msr.h +++ b/include/asm-i386/msr.h | |||
@@ -83,6 +83,9 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) | |||
83 | : "c" (counter)) | 83 | : "c" (counter)) |
84 | #endif /* !CONFIG_PARAVIRT */ | 84 | #endif /* !CONFIG_PARAVIRT */ |
85 | 85 | ||
86 | void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); | ||
87 | void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); | ||
88 | |||
86 | /* symbolic names for some interesting MSRs */ | 89 | /* symbolic names for some interesting MSRs */ |
87 | /* Intel defined MSRs. */ | 90 | /* Intel defined MSRs. */ |
88 | #define MSR_IA32_P5_MC_ADDR 0 | 91 | #define MSR_IA32_P5_MC_ADDR 0 |