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authorjohn stultz <johnstul@us.ibm.com>2006-06-26 03:25:10 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 12:58:21 -0400
commit539eb11e6e904f2cd4f62908cc5e44d724879721 (patch)
treedf18c747c5226b138862fb19fad5b1527055b9c9 /include/asm-i386/timex.h
parent8d016ef1380a2a9a5ca5742ede04334199868f82 (diff)
[PATCH] Time: i386 Conversion - part 2: Rework TSC Support
As part of the i386 conversion to the generic timekeeping infrastructure, this introduces a new tsc.c file. The code in this file replaces the TSC initialization, management and access code currently in timer_tsc.c (which will be removed) that we want to preserve. The code also introduces the following functionality: o tsc_khz: like cpu_khz but stores the TSC frequency on systems that do not change TSC frequency w/ CPU frequency o check/mark_tsc_unstable: accessor/modifier flag for TSC timekeeping usability o minor cleanups to calibration math. This patch also includes a one line __cpuinitdata fix from Zwane Mwaikambo. Signed-off-by: John Stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/timex.h')
-rw-r--r--include/asm-i386/timex.h34
1 files changed, 1 insertions, 33 deletions
diff --git a/include/asm-i386/timex.h b/include/asm-i386/timex.h
index d434984303ca..3666044409f0 100644
--- a/include/asm-i386/timex.h
+++ b/include/asm-i386/timex.h
@@ -7,6 +7,7 @@
7#define _ASMi386_TIMEX_H 7#define _ASMi386_TIMEX_H
8 8
9#include <asm/processor.h> 9#include <asm/processor.h>
10#include <asm/tsc.h>
10 11
11#ifdef CONFIG_X86_ELAN 12#ifdef CONFIG_X86_ELAN
12# define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ 13# define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */
@@ -15,39 +16,6 @@
15#endif 16#endif
16 17
17 18
18/*
19 * Standard way to access the cycle counter on i586+ CPUs.
20 * Currently only used on SMP.
21 *
22 * If you really have a SMP machine with i486 chips or older,
23 * compile for that, and this will just always return zero.
24 * That's ok, it just means that the nicer scheduling heuristics
25 * won't work for you.
26 *
27 * We only use the low 32 bits, and we'd simply better make sure
28 * that we reschedule before that wraps. Scheduling at least every
29 * four billion cycles just basically sounds like a good idea,
30 * regardless of how fast the machine is.
31 */
32typedef unsigned long long cycles_t;
33
34static inline cycles_t get_cycles (void)
35{
36 unsigned long long ret=0;
37
38#ifndef CONFIG_X86_TSC
39 if (!cpu_has_tsc)
40 return 0;
41#endif
42
43#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
44 rdtscll(ret);
45#endif
46 return ret;
47}
48
49extern unsigned int cpu_khz;
50
51extern int read_current_timer(unsigned long *timer_value); 19extern int read_current_timer(unsigned long *timer_value);
52#define ARCH_HAS_READ_CURRENT_TIMER 1 20#define ARCH_HAS_READ_CURRENT_TIMER 1
53 21