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authorZachary Amsden <zach@vmware.com>2006-10-01 02:29:35 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-01 03:39:34 -0400
commit23002d88be309a7c78db69363c9d933a29a3b0bb (patch)
treeecd99ef70c0f38ff81bf2e3c6d7caeed2b88b41e /include/asm-i386/pgtable.h
parent25e4df5bae333a06cd2c9b88baf14432652dc9f7 (diff)
[PATCH] paravirt: kpte flush
Create a new PTE function which combines clearing a kernel PTE with the subsequent flush. This allows the two to be easily combined into a single hypercall or paravirt-op. More subtly, reverse the order of the flush for kmap_atomic. Instead of flushing on establishing a mapping, flush on clearing a mapping. This eliminates the possibility of leaving stale kmap entries which may still have valid TLB mappings. This is required for direct mode hypervisors, which need to reprotect all mappings of a given page when changing the page type from a normal page to a protected page (such as a page table or descriptor table page). But it also provides some nicer semantics for real hardware, by providing extra debug-proofing against using stale mappings, as well as ensuring that no stale mappings exist when changing the cacheability attributes of a page, which could lead to cache conflicts when two different types of mappings exist for the same page. Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/pgtable.h')
-rw-r--r--include/asm-i386/pgtable.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 94c87ff4b5ac..ee9696d2f67f 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -441,6 +441,13 @@ extern pte_t *lookup_address(unsigned long address);
441#define pte_unmap_nested(pte) do { } while (0) 441#define pte_unmap_nested(pte) do { } while (0)
442#endif 442#endif
443 443
444/* Clear a kernel PTE and flush it from the TLB */
445#define kpte_clear_flush(ptep, vaddr) \
446do { \
447 pte_clear(&init_mm, vaddr, ptep); \
448 __flush_tlb_one(vaddr); \
449} while (0)
450
444/* 451/*
445 * The i386 doesn't have any external MMU info: the kernel page 452 * The i386 doesn't have any external MMU info: the kernel page
446 * tables contain all the necessary information. 453 * tables contain all the necessary information.