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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 16:07:55 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 16:07:55 -0400
commitb278240839e20fa9384ea430df463b367b90e04e (patch)
treef99f0c8cdd4cc7f177cd75440e6bd181cded7fb3 /include/asm-i386/mach-summit
parentdd77a4ee0f3981693d4229aa1d57cea9e526ff47 (diff)
parent3f75f42d7733e73aca5c78326489efd4189e0111 (diff)
Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits) [PATCH] Don't set calgary iommu as default y [PATCH] i386/x86-64: New Intel feature flags [PATCH] x86: Add a cumulative thermal throttle event counter. [PATCH] i386: Make the jiffies compares use the 64bit safe macros. [PATCH] x86: Refactor thermal throttle processing [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64) [PATCH] Fix unwinder warning in traps.c [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1 [PATCH] x86: Move direct PCI scanning functions out of line [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI [PATCH] Don't leak NT bit into next task [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder [PATCH] Fix some broken white space in ia32_signal.c [PATCH] Initialize argument registers for 32bit signal handlers. [PATCH] Remove all traces of signal number conversion [PATCH] Don't synchronize time reading on single core AMD systems [PATCH] Remove outdated comment in x86-64 mmconfig code [PATCH] Use string instructions for Core2 copy/clear [PATCH] x86: - restore i8259A eoi status on resume [PATCH] i386: Split multi-line printk in oops output. ...
Diffstat (limited to 'include/asm-i386/mach-summit')
-rw-r--r--include/asm-i386/mach-summit/mach_apic.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/include/asm-i386/mach-summit/mach_apic.h b/include/asm-i386/mach-summit/mach_apic.h
index 9fd073286289..a81b05961595 100644
--- a/include/asm-i386/mach-summit/mach_apic.h
+++ b/include/asm-i386/mach-summit/mach_apic.h
@@ -46,10 +46,12 @@ extern u8 cpu_2_logical_apicid[];
46static inline void init_apic_ldr(void) 46static inline void init_apic_ldr(void)
47{ 47{
48 unsigned long val, id; 48 unsigned long val, id;
49 int i, count; 49 int count = 0;
50 u8 lid;
51 u8 my_id = (u8)hard_smp_processor_id(); 50 u8 my_id = (u8)hard_smp_processor_id();
52 u8 my_cluster = (u8)apicid_cluster(my_id); 51 u8 my_cluster = (u8)apicid_cluster(my_id);
52#ifdef CONFIG_SMP
53 u8 lid;
54 int i;
53 55
54 /* Create logical APIC IDs by counting CPUs already in cluster. */ 56 /* Create logical APIC IDs by counting CPUs already in cluster. */
55 for (count = 0, i = NR_CPUS; --i >= 0; ) { 57 for (count = 0, i = NR_CPUS; --i >= 0; ) {
@@ -57,6 +59,7 @@ static inline void init_apic_ldr(void)
57 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster) 59 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
58 ++count; 60 ++count;
59 } 61 }
62#endif
60 /* We only have a 4 wide bitmap in cluster mode. If a deranged 63 /* We only have a 4 wide bitmap in cluster mode. If a deranged
61 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */ 64 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
62 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT); 65 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
@@ -91,9 +94,13 @@ static inline int apicid_to_node(int logical_apicid)
91/* Mapping from cpu number to logical apicid */ 94/* Mapping from cpu number to logical apicid */
92static inline int cpu_to_logical_apicid(int cpu) 95static inline int cpu_to_logical_apicid(int cpu)
93{ 96{
97#ifdef CONFIG_SMP
94 if (cpu >= NR_CPUS) 98 if (cpu >= NR_CPUS)
95 return BAD_APICID; 99 return BAD_APICID;
96 return (int)cpu_2_logical_apicid[cpu]; 100 return (int)cpu_2_logical_apicid[cpu];
101#else
102 return logical_smp_processor_id();
103#endif
97} 104}
98 105
99static inline int cpu_present_to_apicid(int mps_cpu) 106static inline int cpu_present_to_apicid(int mps_cpu)