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authorNatalie Protasevich <Natalie.Protasevich@unisys.com>2005-06-23 03:08:22 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-23 12:45:09 -0400
commitca05fea6db5259c6d62e517c41d448a4249175f4 (patch)
treefae2369b5a38a7b01be366129b5dc3105acfacf6 /include/asm-i386/mach-numaq/mach_apic.h
parent7c1def1652c6c1a95eafca2991baace34afaed0f (diff)
[PATCH] Do not enforce unique IO_APIC_ID check for xAPIC systems (i386)
This patch is per Andi's request to remove NO_IOAPIC_CHECK from genapic and use heuristics to prevent unique I/O APIC ID check for systems that don't need it. The patch disables unique I/O APIC ID check for Xeon-based and other platforms that don't use serial APIC bus for interrupt delivery. Andi stated that AMD systems don't need unique IO_APIC_IDs either. Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/mach-numaq/mach_apic.h')
-rw-r--r--include/asm-i386/mach-numaq/mach_apic.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-i386/mach-numaq/mach_apic.h
index e1a04494764a..9d158095da82 100644
--- a/include/asm-i386/mach-numaq/mach_apic.h
+++ b/include/asm-i386/mach-numaq/mach_apic.h
@@ -17,8 +17,6 @@ static inline cpumask_t target_cpus(void)
17#define NO_BALANCE_IRQ (1) 17#define NO_BALANCE_IRQ (1)
18#define esr_disable (1) 18#define esr_disable (1)
19 19
20#define NO_IOAPIC_CHECK (0)
21
22#define INT_DELIVERY_MODE dest_LowestPrio 20#define INT_DELIVERY_MODE dest_LowestPrio
23#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */ 21#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
24 22