aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-i386/mach-numaq/mach_apic.h
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-i386/mach-numaq/mach_apic.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-i386/mach-numaq/mach_apic.h')
-rw-r--r--include/asm-i386/mach-numaq/mach_apic.h151
1 files changed, 151 insertions, 0 deletions
diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-i386/mach-numaq/mach_apic.h
new file mode 100644
index 000000000000..e1a04494764a
--- /dev/null
+++ b/include/asm-i386/mach-numaq/mach_apic.h
@@ -0,0 +1,151 @@
1#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4#include <asm/io.h>
5#include <linux/mmzone.h>
6#include <linux/nodemask.h>
7
8#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
9
10static inline cpumask_t target_cpus(void)
11{
12 return CPU_MASK_ALL;
13}
14
15#define TARGET_CPUS (target_cpus())
16
17#define NO_BALANCE_IRQ (1)
18#define esr_disable (1)
19
20#define NO_IOAPIC_CHECK (0)
21
22#define INT_DELIVERY_MODE dest_LowestPrio
23#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
24
25#define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap)
26#define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map)
27#define apicid_cluster(apicid) (apicid & 0xF0)
28
29static inline int apic_id_registered(void)
30{
31 return 1;
32}
33
34static inline void init_apic_ldr(void)
35{
36 /* Already done in NUMA-Q firmware */
37}
38
39static inline void clustered_apic_check(void)
40{
41 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
42 "NUMA-Q", nr_ioapics);
43}
44
45/*
46 * Skip adding the timer int on secondary nodes, which causes
47 * a small but painful rift in the time-space continuum.
48 */
49static inline int multi_timer_check(int apic, int irq)
50{
51 return apic != 0 && irq == 0;
52}
53
54static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
55{
56 /* We don't have a good way to do this yet - hack */
57 return physids_promote(0xFUL);
58}
59
60/* Mapping from cpu number to logical apicid */
61extern u8 cpu_2_logical_apicid[];
62static inline int cpu_to_logical_apicid(int cpu)
63{
64 if (cpu >= NR_CPUS)
65 return BAD_APICID;
66 return (int)cpu_2_logical_apicid[cpu];
67}
68
69/*
70 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
71 * cpu to APIC ID relation to properly interact with the intelligent
72 * mode of the cluster controller.
73 */
74static inline int cpu_present_to_apicid(int mps_cpu)
75{
76 if (mps_cpu < 60)
77 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
78 else
79 return BAD_APICID;
80}
81
82static inline int generate_logical_apicid(int quad, int phys_apicid)
83{
84 return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
85}
86
87static inline int apicid_to_node(int logical_apicid)
88{
89 return logical_apicid >> 4;
90}
91
92static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
93{
94 int node = apicid_to_node(logical_apicid);
95 int cpu = __ffs(logical_apicid & 0xf);
96
97 return physid_mask_of_physid(cpu + 4*node);
98}
99
100static inline int mpc_apic_id(struct mpc_config_processor *m,
101 struct mpc_config_translation *translation_record)
102{
103 int quad = translation_record->trans_quad;
104 int logical_apicid = generate_logical_apicid(quad, m->mpc_apicid);
105
106 printk("Processor #%d %ld:%ld APIC version %d (quad %d, apic %d)\n",
107 m->mpc_apicid,
108 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
109 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
110 m->mpc_apicver, quad, logical_apicid);
111 return logical_apicid;
112}
113
114static inline void setup_portio_remap(void)
115{
116 int num_quads = num_online_nodes();
117
118 if (num_quads <= 1)
119 return;
120
121 printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
122 xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
123 printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
124 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
125}
126
127static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
128{
129 return (1);
130}
131
132static inline void enable_apic_mode(void)
133{
134}
135
136/*
137 * We use physical apicids here, not logical, so just return the default
138 * physical broadcast to stop people from breaking us
139 */
140static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
141{
142 return (int) 0xF;
143}
144
145/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
146static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
147{
148 return cpuid_apic >> index_msb;
149}
150
151#endif /* __ASM_MACH_APIC_H */