diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 05:20:03 -0400 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 05:20:03 -0400 |
commit | 96a388de5dc53a8b234b3fd41f3ae2cedc9ffd42 (patch) | |
tree | d947a467aa2da3140279617bc4b9b101640d7bf4 /include/asm-i386/mach-bigsmp | |
parent | 27bd0c955648646abf2a353a8371d28c37bcd982 (diff) |
i386/x86_64: move headers to include/asm-x86
Move the headers to include/asm-x86 and fixup the
header install make rules
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-i386/mach-bigsmp')
-rw-r--r-- | include/asm-i386/mach-bigsmp/mach_apic.h | 158 | ||||
-rw-r--r-- | include/asm-i386/mach-bigsmp/mach_apicdef.h | 13 | ||||
-rw-r--r-- | include/asm-i386/mach-bigsmp/mach_ipi.h | 25 | ||||
-rw-r--r-- | include/asm-i386/mach-bigsmp/mach_mpspec.h | 8 |
4 files changed, 0 insertions, 204 deletions
diff --git a/include/asm-i386/mach-bigsmp/mach_apic.h b/include/asm-i386/mach-bigsmp/mach_apic.h deleted file mode 100644 index ebd319f838ab..000000000000 --- a/include/asm-i386/mach-bigsmp/mach_apic.h +++ /dev/null | |||
@@ -1,158 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_APIC_H | ||
2 | #define __ASM_MACH_APIC_H | ||
3 | |||
4 | |||
5 | extern u8 bios_cpu_apicid[]; | ||
6 | |||
7 | #define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu]) | ||
8 | #define esr_disable (1) | ||
9 | |||
10 | static inline int apic_id_registered(void) | ||
11 | { | ||
12 | return (1); | ||
13 | } | ||
14 | |||
15 | /* Round robin the irqs amoung the online cpus */ | ||
16 | static inline cpumask_t target_cpus(void) | ||
17 | { | ||
18 | static unsigned long cpu = NR_CPUS; | ||
19 | do { | ||
20 | if (cpu >= NR_CPUS) | ||
21 | cpu = first_cpu(cpu_online_map); | ||
22 | else | ||
23 | cpu = next_cpu(cpu, cpu_online_map); | ||
24 | } while (cpu >= NR_CPUS); | ||
25 | return cpumask_of_cpu(cpu); | ||
26 | } | ||
27 | |||
28 | #undef APIC_DEST_LOGICAL | ||
29 | #define APIC_DEST_LOGICAL 0 | ||
30 | #define TARGET_CPUS (target_cpus()) | ||
31 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
32 | #define INT_DELIVERY_MODE (dest_Fixed) | ||
33 | #define INT_DEST_MODE (0) /* phys delivery to target proc */ | ||
34 | #define NO_BALANCE_IRQ (0) | ||
35 | #define WAKE_SECONDARY_VIA_INIT | ||
36 | |||
37 | |||
38 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
39 | { | ||
40 | return (0); | ||
41 | } | ||
42 | |||
43 | static inline unsigned long check_apicid_present(int bit) | ||
44 | { | ||
45 | return (1); | ||
46 | } | ||
47 | |||
48 | static inline unsigned long calculate_ldr(int cpu) | ||
49 | { | ||
50 | unsigned long val, id; | ||
51 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
52 | id = xapic_phys_to_log_apicid(cpu); | ||
53 | val |= SET_APIC_LOGICAL_ID(id); | ||
54 | return val; | ||
55 | } | ||
56 | |||
57 | /* | ||
58 | * Set up the logical destination ID. | ||
59 | * | ||
60 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
61 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
62 | * document number 292116). So here it goes... | ||
63 | */ | ||
64 | static inline void init_apic_ldr(void) | ||
65 | { | ||
66 | unsigned long val; | ||
67 | int cpu = smp_processor_id(); | ||
68 | |||
69 | apic_write_around(APIC_DFR, APIC_DFR_VALUE); | ||
70 | val = calculate_ldr(cpu); | ||
71 | apic_write_around(APIC_LDR, val); | ||
72 | } | ||
73 | |||
74 | static inline void setup_apic_routing(void) | ||
75 | { | ||
76 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | ||
77 | "Physflat", nr_ioapics); | ||
78 | } | ||
79 | |||
80 | static inline int multi_timer_check(int apic, int irq) | ||
81 | { | ||
82 | return (0); | ||
83 | } | ||
84 | |||
85 | static inline int apicid_to_node(int logical_apicid) | ||
86 | { | ||
87 | return (0); | ||
88 | } | ||
89 | |||
90 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
91 | { | ||
92 | if (mps_cpu < NR_CPUS) | ||
93 | return (int) bios_cpu_apicid[mps_cpu]; | ||
94 | |||
95 | return BAD_APICID; | ||
96 | } | ||
97 | |||
98 | static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) | ||
99 | { | ||
100 | return physid_mask_of_physid(phys_apicid); | ||
101 | } | ||
102 | |||
103 | extern u8 cpu_2_logical_apicid[]; | ||
104 | /* Mapping from cpu number to logical apicid */ | ||
105 | static inline int cpu_to_logical_apicid(int cpu) | ||
106 | { | ||
107 | if (cpu >= NR_CPUS) | ||
108 | return BAD_APICID; | ||
109 | return cpu_physical_id(cpu); | ||
110 | } | ||
111 | |||
112 | static inline int mpc_apic_id(struct mpc_config_processor *m, | ||
113 | struct mpc_config_translation *translation_record) | ||
114 | { | ||
115 | printk("Processor #%d %ld:%ld APIC version %d\n", | ||
116 | m->mpc_apicid, | ||
117 | (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, | ||
118 | (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, | ||
119 | m->mpc_apicver); | ||
120 | return m->mpc_apicid; | ||
121 | } | ||
122 | |||
123 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
124 | { | ||
125 | /* For clustered we don't have a good way to do this yet - hack */ | ||
126 | return physids_promote(0xFFL); | ||
127 | } | ||
128 | |||
129 | static inline void setup_portio_remap(void) | ||
130 | { | ||
131 | } | ||
132 | |||
133 | static inline void enable_apic_mode(void) | ||
134 | { | ||
135 | } | ||
136 | |||
137 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
138 | { | ||
139 | return (1); | ||
140 | } | ||
141 | |||
142 | /* As we are using single CPU as destination, pick only one CPU here */ | ||
143 | static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) | ||
144 | { | ||
145 | int cpu; | ||
146 | int apicid; | ||
147 | |||
148 | cpu = first_cpu(cpumask); | ||
149 | apicid = cpu_to_logical_apicid(cpu); | ||
150 | return apicid; | ||
151 | } | ||
152 | |||
153 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
154 | { | ||
155 | return cpuid_apic >> index_msb; | ||
156 | } | ||
157 | |||
158 | #endif /* __ASM_MACH_APIC_H */ | ||
diff --git a/include/asm-i386/mach-bigsmp/mach_apicdef.h b/include/asm-i386/mach-bigsmp/mach_apicdef.h deleted file mode 100644 index a58ab5a75c8c..000000000000 --- a/include/asm-i386/mach-bigsmp/mach_apicdef.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_APICDEF_H | ||
2 | #define __ASM_MACH_APICDEF_H | ||
3 | |||
4 | #define APIC_ID_MASK (0xFF<<24) | ||
5 | |||
6 | static inline unsigned get_apic_id(unsigned long x) | ||
7 | { | ||
8 | return (((x)>>24)&0xFF); | ||
9 | } | ||
10 | |||
11 | #define GET_APIC_ID(x) get_apic_id(x) | ||
12 | |||
13 | #endif | ||
diff --git a/include/asm-i386/mach-bigsmp/mach_ipi.h b/include/asm-i386/mach-bigsmp/mach_ipi.h deleted file mode 100644 index 9404c535b7ec..000000000000 --- a/include/asm-i386/mach-bigsmp/mach_ipi.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_IPI_H | ||
2 | #define __ASM_MACH_IPI_H | ||
3 | |||
4 | void send_IPI_mask_sequence(cpumask_t mask, int vector); | ||
5 | |||
6 | static inline void send_IPI_mask(cpumask_t mask, int vector) | ||
7 | { | ||
8 | send_IPI_mask_sequence(mask, vector); | ||
9 | } | ||
10 | |||
11 | static inline void send_IPI_allbutself(int vector) | ||
12 | { | ||
13 | cpumask_t mask = cpu_online_map; | ||
14 | cpu_clear(smp_processor_id(), mask); | ||
15 | |||
16 | if (!cpus_empty(mask)) | ||
17 | send_IPI_mask(mask, vector); | ||
18 | } | ||
19 | |||
20 | static inline void send_IPI_all(int vector) | ||
21 | { | ||
22 | send_IPI_mask(cpu_online_map, vector); | ||
23 | } | ||
24 | |||
25 | #endif /* __ASM_MACH_IPI_H */ | ||
diff --git a/include/asm-i386/mach-bigsmp/mach_mpspec.h b/include/asm-i386/mach-bigsmp/mach_mpspec.h deleted file mode 100644 index 6b5dadcf1d0e..000000000000 --- a/include/asm-i386/mach-bigsmp/mach_mpspec.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_MPSPEC_H | ||
2 | #define __ASM_MACH_MPSPEC_H | ||
3 | |||
4 | #define MAX_IRQ_SOURCES 256 | ||
5 | |||
6 | #define MAX_MP_BUSSES 32 | ||
7 | |||
8 | #endif /* __ASM_MACH_MPSPEC_H */ | ||