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authorZachary Amsden <zach@vmware.com>2006-01-06 03:11:47 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-06 11:33:33 -0500
commit7c4cb60e5b97677424e95baee9c29df54b26e6ba (patch)
treea2ad6e6104e153d15bc4bfbb67f74b0e05fea03c /include/asm-i386/desc.h
parent599a6e8ca4ff7f453f847217ecc2718d68e3b0f6 (diff)
[PATCH] x86: GDT alignment fix
Make GDT page aligned and page padded to support running inside of a hypervisor. This prevents false sharing of the GDT page with other hot data, which is not allowed in Xen, and causes performance problems in VMware. Rather than go back to the old method of statically allocating the GDT (which wastes unneded space for non-present CPUs), the GDT for APs is allocated dynamically. Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: "Seth, Rohit" <rohit.seth@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/desc.h')
-rw-r--r--include/asm-i386/desc.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h
index 29b851a18c6e..494e73bca095 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-i386/desc.h
@@ -15,9 +15,6 @@
15#include <asm/mmu.h> 15#include <asm/mmu.h>
16 16
17extern struct desc_struct cpu_gdt_table[GDT_ENTRIES]; 17extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
18DECLARE_PER_CPU(struct desc_struct, cpu_gdt_table[GDT_ENTRIES]);
19
20#define get_cpu_gdt_table(_cpu) (per_cpu(cpu_gdt_table,_cpu))
21 18
22DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]); 19DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
23 20
@@ -29,6 +26,11 @@ struct Xgt_desc_struct {
29 26
30extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; 27extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
31 28
29static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
30{
31 return ((struct desc_struct *)cpu_gdt_descr[cpu].address);
32}
33
32#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8)) 34#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
33#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)) 35#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
34 36