diff options
| author | Andi Kleen <ak@suse.de> | 2007-05-02 13:27:20 -0400 |
|---|---|---|
| committer | Andi Kleen <andi@basil.nowhere.org> | 2007-05-02 13:27:20 -0400 |
| commit | 3aefbe0746580a710d4392a884ac1e4aac7c728f (patch) | |
| tree | a83d2b9dccdce97c57e5914831310762dd27a5de /include/asm-i386/cpufeature.h | |
| parent | e859dc553c857f4672b3bbb73ee9170a901f8712 (diff) | |
[PATCH] i386: Implement X86_FEATURE_SYNC_RDTSC on i386
Syncs up with x86-64.
Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'include/asm-i386/cpufeature.h')
| -rw-r--r-- | include/asm-i386/cpufeature.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index 20e849ae6ddc..b8a3a5a85fd3 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h | |||
| @@ -79,6 +79,7 @@ | |||
| 79 | #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ | 79 | #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ |
| 80 | #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ | 80 | #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ |
| 81 | #define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */ | 81 | #define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */ |
| 82 | #define X86_FEATURE_SYNC_RDTSC (3*32+15) /* RDTSC synchronizes the CPU */ | ||
| 82 | 83 | ||
| 83 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | 84 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ |
| 84 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ | 85 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ |