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authorVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>2005-09-03 18:56:31 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:06:10 -0400
commit911a62d42365076209e2c327e7688db296e35d62 (patch)
tree51e6d8525cd3547ea43129b5dd20339655674d57 /include/asm-i386/apicdef.h
parent484b90c4b965d54037ff99b198d84cdf144f8a35 (diff)
[PATCH] x86: sutomatically enable bigsmp when we have more than 8 CPUs
i386 generic subarchitecture requires explicit dmi strings or command line to enable bigsmp mode. The patch below removes that restriction, and uses bigsmp as soon as it finds more than 8 logical CPUs, Intel processors and xAPIC support. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/apicdef.h')
-rw-r--r--include/asm-i386/apicdef.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-i386/apicdef.h b/include/asm-i386/apicdef.h
index a96a8f48fbfc..03185cef8e0a 100644
--- a/include/asm-i386/apicdef.h
+++ b/include/asm-i386/apicdef.h
@@ -16,6 +16,7 @@
16#define GET_APIC_VERSION(x) ((x)&0xFF) 16#define GET_APIC_VERSION(x) ((x)&0xFF)
17#define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF) 17#define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF)
18#define APIC_INTEGRATED(x) ((x)&0xF0) 18#define APIC_INTEGRATED(x) ((x)&0xF0)
19#define APIC_XAPIC(x) ((x) >= 0x14)
19#define APIC_TASKPRI 0x80 20#define APIC_TASKPRI 0x80
20#define APIC_TPRI_MASK 0xFF 21#define APIC_TPRI_MASK 0xFF
21#define APIC_ARBPRI 0x90 22#define APIC_ARBPRI 0x90