diff options
author | Tejun Heo <tj@kernel.org> | 2011-05-24 03:59:36 -0400 |
---|---|---|
committer | Tejun Heo <tj@kernel.org> | 2011-05-24 03:59:36 -0400 |
commit | 6988f20fe04e9ef3aea488cb8ab57fbeb78e12f0 (patch) | |
tree | c9d7fc50a2e2147a5ca07e3096e7eeb916ad2da9 /include/asm-generic/vmlinux.lds.h | |
parent | 0415b00d175e0d8945e6785aad21b5f157976ce0 (diff) | |
parent | 6ea0c34dac89611126455537552cffe6c7e832ad (diff) |
Merge branch 'fixes-2.6.39' into for-2.6.40
Diffstat (limited to 'include/asm-generic/vmlinux.lds.h')
-rw-r--r-- | include/asm-generic/vmlinux.lds.h | 44 |
1 files changed, 24 insertions, 20 deletions
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index f301cea5ca2d..ebdaafa866a7 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h | |||
@@ -688,6 +688,28 @@ | |||
688 | } | 688 | } |
689 | 689 | ||
690 | /** | 690 | /** |
691 | * PERCPU_INPUT - the percpu input sections | ||
692 | * @cacheline: cacheline size | ||
693 | * | ||
694 | * The core percpu section names and core symbols which do not rely | ||
695 | * directly upon load addresses. | ||
696 | * | ||
697 | * @cacheline is used to align subsections to avoid false cacheline | ||
698 | * sharing between subsections for different purposes. | ||
699 | */ | ||
700 | #define PERCPU_INPUT(cacheline) \ | ||
701 | VMLINUX_SYMBOL(__per_cpu_start) = .; \ | ||
702 | *(.data..percpu..first) \ | ||
703 | . = ALIGN(PAGE_SIZE); \ | ||
704 | *(.data..percpu..page_aligned) \ | ||
705 | . = ALIGN(cacheline); \ | ||
706 | *(.data..percpu..readmostly) \ | ||
707 | . = ALIGN(cacheline); \ | ||
708 | *(.data..percpu) \ | ||
709 | *(.data..percpu..shared_aligned) \ | ||
710 | VMLINUX_SYMBOL(__per_cpu_end) = .; | ||
711 | |||
712 | /** | ||
691 | * PERCPU_VADDR - define output section for percpu area | 713 | * PERCPU_VADDR - define output section for percpu area |
692 | * @cacheline: cacheline size | 714 | * @cacheline: cacheline size |
693 | * @vaddr: explicit base address (optional) | 715 | * @vaddr: explicit base address (optional) |
@@ -715,16 +737,7 @@ | |||
715 | VMLINUX_SYMBOL(__per_cpu_load) = .; \ | 737 | VMLINUX_SYMBOL(__per_cpu_load) = .; \ |
716 | .data..percpu vaddr : AT(VMLINUX_SYMBOL(__per_cpu_load) \ | 738 | .data..percpu vaddr : AT(VMLINUX_SYMBOL(__per_cpu_load) \ |
717 | - LOAD_OFFSET) { \ | 739 | - LOAD_OFFSET) { \ |
718 | VMLINUX_SYMBOL(__per_cpu_start) = .; \ | 740 | PERCPU_INPUT(cacheline) \ |
719 | *(.data..percpu..first) \ | ||
720 | . = ALIGN(PAGE_SIZE); \ | ||
721 | *(.data..percpu..page_aligned) \ | ||
722 | . = ALIGN(cacheline); \ | ||
723 | *(.data..percpu..readmostly) \ | ||
724 | . = ALIGN(cacheline); \ | ||
725 | *(.data..percpu) \ | ||
726 | *(.data..percpu..shared_aligned) \ | ||
727 | VMLINUX_SYMBOL(__per_cpu_end) = .; \ | ||
728 | } phdr \ | 741 | } phdr \ |
729 | . = VMLINUX_SYMBOL(__per_cpu_load) + SIZEOF(.data..percpu); | 742 | . = VMLINUX_SYMBOL(__per_cpu_load) + SIZEOF(.data..percpu); |
730 | 743 | ||
@@ -744,16 +757,7 @@ | |||
744 | . = ALIGN(PAGE_SIZE); \ | 757 | . = ALIGN(PAGE_SIZE); \ |
745 | .data..percpu : AT(ADDR(.data..percpu) - LOAD_OFFSET) { \ | 758 | .data..percpu : AT(ADDR(.data..percpu) - LOAD_OFFSET) { \ |
746 | VMLINUX_SYMBOL(__per_cpu_load) = .; \ | 759 | VMLINUX_SYMBOL(__per_cpu_load) = .; \ |
747 | VMLINUX_SYMBOL(__per_cpu_start) = .; \ | 760 | PERCPU_INPUT(cacheline) \ |
748 | *(.data..percpu..first) \ | ||
749 | . = ALIGN(PAGE_SIZE); \ | ||
750 | *(.data..percpu..page_aligned) \ | ||
751 | . = ALIGN(cacheline); \ | ||
752 | *(.data..percpu..readmostly) \ | ||
753 | . = ALIGN(cacheline); \ | ||
754 | *(.data..percpu) \ | ||
755 | *(.data..percpu..shared_aligned) \ | ||
756 | VMLINUX_SYMBOL(__per_cpu_end) = .; \ | ||
757 | } | 761 | } |
758 | 762 | ||
759 | 763 | ||