diff options
author | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-02-22 06:06:43 -0500 |
---|---|---|
committer | GuanXuetao <gxt@mprc.pku.edu.cn> | 2011-03-16 21:19:03 -0400 |
commit | 7dc59bdde7063323b6a70c2f0fadb399ede8038d (patch) | |
tree | e288e1bbcb1ed68ad36514e82f8090acea4d17e0 /include/asm-generic/io.h | |
parent | 521cb40b0c44418a4fd36dc633f575813d59a43d (diff) |
asm-generic: fix inX/outX functions for architectures that have PCI
The definitions for the PC-style PIO functions in asm-generic/io.h were
meant as dummies so you could compile code on architectures without
ISA and PCI buses. However, unicore32 actually wants to use them
with a real PCI bus, so they need to be defined to actually address
the register window holding the I/O ports.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/asm-generic/io.h')
-rw-r--r-- | include/asm-generic/io.h | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index 4644c9a7f724..e0ffa3ddb02a 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h | |||
@@ -94,6 +94,10 @@ static inline void __raw_writeq(u64 b, volatile void __iomem *addr) | |||
94 | #define writeq(b,addr) __raw_writeq(__cpu_to_le64(b),addr) | 94 | #define writeq(b,addr) __raw_writeq(__cpu_to_le64(b),addr) |
95 | #endif | 95 | #endif |
96 | 96 | ||
97 | #ifndef PCI_IOBASE | ||
98 | #define PCI_IOBASE ((void __iomem *) 0) | ||
99 | #endif | ||
100 | |||
97 | /*****************************************************************************/ | 101 | /*****************************************************************************/ |
98 | /* | 102 | /* |
99 | * traditional input/output functions | 103 | * traditional input/output functions |
@@ -101,32 +105,32 @@ static inline void __raw_writeq(u64 b, volatile void __iomem *addr) | |||
101 | 105 | ||
102 | static inline u8 inb(unsigned long addr) | 106 | static inline u8 inb(unsigned long addr) |
103 | { | 107 | { |
104 | return readb((volatile void __iomem *) addr); | 108 | return readb(addr + PCI_IOBASE); |
105 | } | 109 | } |
106 | 110 | ||
107 | static inline u16 inw(unsigned long addr) | 111 | static inline u16 inw(unsigned long addr) |
108 | { | 112 | { |
109 | return readw((volatile void __iomem *) addr); | 113 | return readw(addr + PCI_IOBASE); |
110 | } | 114 | } |
111 | 115 | ||
112 | static inline u32 inl(unsigned long addr) | 116 | static inline u32 inl(unsigned long addr) |
113 | { | 117 | { |
114 | return readl((volatile void __iomem *) addr); | 118 | return readl(addr + PCI_IOBASE); |
115 | } | 119 | } |
116 | 120 | ||
117 | static inline void outb(u8 b, unsigned long addr) | 121 | static inline void outb(u8 b, unsigned long addr) |
118 | { | 122 | { |
119 | writeb(b, (volatile void __iomem *) addr); | 123 | writeb(b, addr + PCI_IOBASE); |
120 | } | 124 | } |
121 | 125 | ||
122 | static inline void outw(u16 b, unsigned long addr) | 126 | static inline void outw(u16 b, unsigned long addr) |
123 | { | 127 | { |
124 | writew(b, (volatile void __iomem *) addr); | 128 | writew(b, addr + PCI_IOBASE); |
125 | } | 129 | } |
126 | 130 | ||
127 | static inline void outl(u32 b, unsigned long addr) | 131 | static inline void outl(u32 b, unsigned long addr) |
128 | { | 132 | { |
129 | writel(b, (volatile void __iomem *) addr); | 133 | writel(b, addr + PCI_IOBASE); |
130 | } | 134 | } |
131 | 135 | ||
132 | #define inb_p(addr) inb(addr) | 136 | #define inb_p(addr) inb(addr) |
@@ -213,32 +217,32 @@ static inline void outsl(unsigned long addr, const void *buffer, int count) | |||
213 | 217 | ||
214 | static inline void readsl(const void __iomem *addr, void *buf, int len) | 218 | static inline void readsl(const void __iomem *addr, void *buf, int len) |
215 | { | 219 | { |
216 | insl((unsigned long)addr, buf, len); | 220 | insl(addr - PCI_IOBASE, buf, len); |
217 | } | 221 | } |
218 | 222 | ||
219 | static inline void readsw(const void __iomem *addr, void *buf, int len) | 223 | static inline void readsw(const void __iomem *addr, void *buf, int len) |
220 | { | 224 | { |
221 | insw((unsigned long)addr, buf, len); | 225 | insw(addr - PCI_IOBASE, buf, len); |
222 | } | 226 | } |
223 | 227 | ||
224 | static inline void readsb(const void __iomem *addr, void *buf, int len) | 228 | static inline void readsb(const void __iomem *addr, void *buf, int len) |
225 | { | 229 | { |
226 | insb((unsigned long)addr, buf, len); | 230 | insb(addr - PCI_IOBASE, buf, len); |
227 | } | 231 | } |
228 | 232 | ||
229 | static inline void writesl(const void __iomem *addr, const void *buf, int len) | 233 | static inline void writesl(const void __iomem *addr, const void *buf, int len) |
230 | { | 234 | { |
231 | outsl((unsigned long)addr, buf, len); | 235 | outsl(addr - PCI_IOBASE, buf, len); |
232 | } | 236 | } |
233 | 237 | ||
234 | static inline void writesw(const void __iomem *addr, const void *buf, int len) | 238 | static inline void writesw(const void __iomem *addr, const void *buf, int len) |
235 | { | 239 | { |
236 | outsw((unsigned long)addr, buf, len); | 240 | outsw(addr - PCI_IOBASE, buf, len); |
237 | } | 241 | } |
238 | 242 | ||
239 | static inline void writesb(const void __iomem *addr, const void *buf, int len) | 243 | static inline void writesb(const void __iomem *addr, const void *buf, int len) |
240 | { | 244 | { |
241 | outsb((unsigned long)addr, buf, len); | 245 | outsb(addr - PCI_IOBASE, buf, len); |
242 | } | 246 | } |
243 | 247 | ||
244 | #ifndef CONFIG_GENERIC_IOMAP | 248 | #ifndef CONFIG_GENERIC_IOMAP |
@@ -269,8 +273,9 @@ static inline void writesb(const void __iomem *addr, const void *buf, int len) | |||
269 | outsl((unsigned long) (p), (src), (count)) | 273 | outsl((unsigned long) (p), (src), (count)) |
270 | #endif /* CONFIG_GENERIC_IOMAP */ | 274 | #endif /* CONFIG_GENERIC_IOMAP */ |
271 | 275 | ||
272 | 276 | #ifndef IO_SPACE_LIMIT | |
273 | #define IO_SPACE_LIMIT 0xffffffff | 277 | #define IO_SPACE_LIMIT 0xffff |
278 | #endif | ||
274 | 279 | ||
275 | #ifdef __KERNEL__ | 280 | #ifdef __KERNEL__ |
276 | 281 | ||