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authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
commitbbb20089a3275a19e475dbc21320c3742e3ca423 (patch)
tree216fdc1cbef450ca688135c5b8969169482d9a48 /include/asm-generic/dma.h
parent3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff)
parent657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff)
Merge branch 'dmaengine' into async-tx-next
Conflicts: crypto/async_tx/async_xor.c drivers/dma/ioat/dma_v2.h drivers/dma/ioat/pci.c drivers/md/raid5.c
Diffstat (limited to 'include/asm-generic/dma.h')
-rw-r--r--include/asm-generic/dma.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-generic/dma.h b/include/asm-generic/dma.h
new file mode 100644
index 000000000000..9dfc3a7f36d2
--- /dev/null
+++ b/include/asm-generic/dma.h
@@ -0,0 +1,15 @@
1#ifndef __ASM_GENERIC_DMA_H
2#define __ASM_GENERIC_DMA_H
3/*
4 * This file traditionally describes the i8237 PC style DMA controller.
5 * Most architectures don't have these any more and can get the minimal
6 * implementation from kernel/dma.c by not defining MAX_DMA_CHANNELS.
7 *
8 * Some code relies on seeing MAX_DMA_ADDRESS though.
9 */
10#define MAX_DMA_ADDRESS PAGE_OFFSET
11
12extern int request_dma(unsigned int dmanr, const char *device_id);
13extern void free_dma(unsigned int dmanr);
14
15#endif /* __ASM_GENERIC_DMA_H */