diff options
author | David Howells <dhowells@redhat.com> | 2006-09-26 02:32:04 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-26 11:48:53 -0400 |
commit | 1bcbba306048ed86b935d57a95d887c23d52c94b (patch) | |
tree | 4c6e20b162415c79a177b72b97b6fb4d246a73b0 /include/asm-frv/mb93493-regs.h | |
parent | 8d6b5eeea5eb644232cbbbe1c927fdf051e60fa5 (diff) |
[PATCH] FRV: Use the generic IRQ stuff
Make the FRV arch use the generic IRQ code rather than having its own
routines for doing so.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-frv/mb93493-regs.h')
-rw-r--r-- | include/asm-frv/mb93493-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-frv/mb93493-regs.h b/include/asm-frv/mb93493-regs.h index c54aa9d14468..8a1f6aac8cf1 100644 --- a/include/asm-frv/mb93493-regs.h +++ b/include/asm-frv/mb93493-regs.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <asm/mb-regs.h> | 15 | #include <asm/mb-regs.h> |
16 | #include <asm/mb93493-irqs.h> | 16 | #include <asm/mb93493-irqs.h> |
17 | 17 | ||
18 | #define __addr_MB93493(X) ((volatile unsigned long *)(__region_CS3 + (X))) | ||
18 | #define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); }) | 19 | #define __get_MB93493(X) ({ *(volatile unsigned long *)(__region_CS3 + (X)); }) |
19 | 20 | ||
20 | #define __set_MB93493(X,V) \ | 21 | #define __set_MB93493(X,V) \ |
@@ -26,6 +27,7 @@ do { \ | |||
26 | #define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V)) | 27 | #define __set_MB93493_STSR(X,V) __set_MB93493(0x3c0 + (X) * 4, (V)) |
27 | #define MB93493_STSR_EN | 28 | #define MB93493_STSR_EN |
28 | 29 | ||
30 | #define __addr_MB93493_IQSR(X) __addr_MB93493(0x3d0 + (X) * 4) | ||
29 | #define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4) | 31 | #define __get_MB93493_IQSR(X) __get_MB93493(0x3d0 + (X) * 4) |
30 | #define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V)) | 32 | #define __set_MB93493_IQSR(X,V) __set_MB93493(0x3d0 + (X) * 4, (V)) |
31 | 33 | ||